bindings/clock/starfive%2Cjh7100-audclk.yaml

0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/starfive,jh7100-audclk.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: StarFive JH7100 Audio Clock Generator
0008
0009 maintainers:
0010   - Emil Renner Berthing <kernel@esmil.dk>
0011
0012 properties:
0013   compatible:
0014     const: starfive,jh7100-audclk
0015
0016   reg:
0017     maxItems: 1
0018
0019   clocks:
0020     items:
0021       - description: Audio source clock
0022       - description: External 12.288MHz clock
0023       - description: Domain 7 AHB bus clock
0024
0025   clock-names:
0026     items:
0027       - const: audio_src
0028       - const: audio_12288
0029       - const: dom7ahb_bus
0030
0031   '#clock-cells':
0032     const: 1
0033     description:
0034       See <dt-bindings/clock/starfive-jh7100-audio.h> for valid indices.
0035
0036 required:
0037   - compatible
0038   - reg
0039   - clocks
0040   - clock-names
0041   - '#clock-cells'
0042
0043 additionalProperties: false
0044
0045 examples:
0046   - |
0047     #include <dt-bindings/clock/starfive-jh7100.h>
0048
0049     clock-controller@10480000 {
0050             compatible = "starfive,jh7100-audclk";
0051             reg = <0x10480000 0x10000>;
0052             clocks = <&clkgen JH7100_CLK_AUDIO_SRC>,
0053                      <&clkgen JH7100_CLK_AUDIO_12288>,
0054                      <&clkgen JH7100_CLK_DOM7AHB_BUS>;
0055             clock-names = "audio_src", "audio_12288", "dom7ahb_bus";
0056             #clock-cells = <1>;
0057     };