0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Reset Clock Controller Binding
0008
0009 maintainers:
0010 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
0011
0012 description: |
0013 The RCC IP is both a reset and a clock controller.
0014 RCC makes also power management (resume/supend and wakeup interrupt).
0015 Please also refer to reset.txt for common reset controller binding usage.
0016
0017 This binding uses common clock bindings
0018 Documentation/devicetree/bindings/clock/clock-bindings.txt
0019
0020 Specifying clocks
0021 =================
0022
0023 All available clocks are defined as preprocessor macros in
0024 dt-bindings/clock/stm32mp1-clks.h header and can be used in device
0025 tree sources.
0026
0027 Specifying softreset control of devices
0028 =======================================
0029
0030 Device nodes should specify the reset channel required in their "resets"
0031 property, containing a phandle to the reset device node and an index specifying
0032 which channel to use.
0033 The index is the bit number within the RCC registers bank, starting from RCC
0034 base address.
0035 It is calculated as: index = register_offset / 4 * 32 + bit_offset.
0036 Where bit_offset is the bit offset within the register.
0037
0038 For example on STM32MP1, for LTDC reset:
0039 ltdc = APB4_RSTSETR_offset / 4 * 32 + LTDC_bit_offset
0040 = 0x180 / 4 * 32 + 0 = 3072
0041
0042 The list of valid indices for STM32MP1 is available in:
0043 include/dt-bindings/reset-controller/stm32mp1-resets.h
0044 include/dt-bindings/reset-controller/stm32mp13-resets.h
0045
0046 This file implements defines like:
0047 #define LTDC_R 3072
0048
0049 properties:
0050 "#clock-cells":
0051 const: 1
0052
0053 "#reset-cells":
0054 const: 1
0055
0056 compatible:
0057 items:
0058 - enum:
0059 - st,stm32mp1-rcc-secure
0060 - st,stm32mp1-rcc
0061 - st,stm32mp13-rcc
0062 - const: syscon
0063 clocks: true
0064 clock-names: true
0065
0066 reg:
0067 maxItems: 1
0068
0069 required:
0070 - "#clock-cells"
0071 - "#reset-cells"
0072 - compatible
0073 - reg
0074
0075 if:
0076 properties:
0077 compatible:
0078 contains:
0079 enum:
0080 - st,stm32mp1-rcc-secure
0081 - st,stm32mp13-rcc
0082 then:
0083 properties:
0084 clocks:
0085 description: Specifies oscillators.
0086 maxItems: 5
0087
0088 clock-names:
0089 items:
0090 - const: hse
0091 - const: hsi
0092 - const: csi
0093 - const: lse
0094 - const: lsi
0095 required:
0096 - clocks
0097 - clock-names
0098 else:
0099 properties:
0100 clocks:
0101 description:
0102 Specifies the external RX clock for ethernet MAC.
0103 maxItems: 1
0104
0105 clock-names:
0106 const: ETH_RX_CLK/ETH_REF_CLK
0107
0108 additionalProperties: false
0109
0110 examples:
0111 - |
0112 #include <dt-bindings/clock/stm32mp1-clks.h>
0113 rcc: rcc@50000000 {
0114 compatible = "st,stm32mp1-rcc-secure", "syscon";
0115 reg = <0x50000000 0x1000>;
0116 #clock-cells = <1>;
0117 #reset-cells = <1>;
0118 clock-names = "hse", "hsi", "csi", "lse", "lsi";
0119 clocks = <&scmi_clk CK_SCMI_HSE>,
0120 <&scmi_clk CK_SCMI_HSI>,
0121 <&scmi_clk CK_SCMI_CSI>,
0122 <&scmi_clk CK_SCMI_LSE>,
0123 <&scmi_clk CK_SCMI_LSI>;
0124 };
0125 ...
