0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright 2019 Unisoc Inc.
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007
0008 title: SC9863A Clock Control Unit Device Tree Bindings
0009
0010 maintainers:
0011 - Orson Zhai <orsonzhai@gmail.com>
0012 - Baolin Wang <baolin.wang7@gmail.com>
0013 - Chunyan Zhang <zhang.lyra@gmail.com>
0014
0015 properties:
0016 "#clock-cells":
0017 const: 1
0018
0019 compatible:
0020 enum:
0021 - sprd,sc9863a-ap-clk
0022 - sprd,sc9863a-aon-clk
0023 - sprd,sc9863a-apahb-gate
0024 - sprd,sc9863a-pmu-gate
0025 - sprd,sc9863a-aonapb-gate
0026 - sprd,sc9863a-pll
0027 - sprd,sc9863a-mpll
0028 - sprd,sc9863a-rpll
0029 - sprd,sc9863a-dpll
0030 - sprd,sc9863a-mm-gate
0031 - sprd,sc9863a-mm-clk
0032 - sprd,sc9863a-apapb-gate
0033
0034 clocks:
0035 minItems: 1
0036 maxItems: 4
0037 description: |
0038 The input parent clock(s) phandle for this clock, only list fixed
0039 clocks which are declared in devicetree.
0040
0041 clock-names:
0042 minItems: 1
0043 items:
0044 - const: ext-26m
0045 - const: ext-32k
0046 - const: ext-4m
0047 - const: rco-100m
0048
0049 reg:
0050 maxItems: 1
0051
0052 required:
0053 - compatible
0054 - '#clock-cells'
0055
0056 if:
0057 properties:
0058 compatible:
0059 enum:
0060 - sprd,sc9863a-ap-clk
0061 - sprd,sc9863a-aon-clk
0062 then:
0063 required:
0064 - reg
0065
0066 else:
0067 description: |
0068 Other SC9863a clock nodes should be the child of a syscon node in
0069 which compatible string shoule be:
0070 "sprd,sc9863a-glbregs", "syscon", "simple-mfd"
0071
0072 The 'reg' property for the clock node is also required if there is a sub
0073 range of registers for the clocks.
0074
0075 additionalProperties: false
0076
0077 examples:
0078 - |
0079 ap_clk: clock-controller@21500000 {
0080 compatible = "sprd,sc9863a-ap-clk";
0081 reg = <0x21500000 0x1000>;
0082 clocks = <&ext_26m>, <&ext_32k>;
0083 clock-names = "ext-26m", "ext-32k";
0084 #clock-cells = <1>;
0085 };
0086
0087 - |
0088 syscon@20e00000 {
0089 compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
0090 reg = <0x20e00000 0x4000>;
0091 #address-cells = <1>;
0092 #size-cells = <1>;
0093 ranges = <0 0x20e00000 0x4000>;
0094
0095 apahb_gate: apahb-gate@0 {
0096 compatible = "sprd,sc9863a-apahb-gate";
0097 reg = <0x0 0x1020>;
0098 #clock-cells = <1>;
0099 };
0100 };
0101
0102 ...
