0001 Spreadtrum SC9860 Clock Binding
0002 ------------------------
0003
0004 Required properties:
0005 - compatible: should contain the following compatible strings:
0006 - "sprd,sc9860-pmu-gate"
0007 - "sprd,sc9860-pll"
0008 - "sprd,sc9860-ap-clk"
0009 - "sprd,sc9860-aon-prediv"
0010 - "sprd,sc9860-apahb-gate"
0011 - "sprd,sc9860-aon-gate"
0012 - "sprd,sc9860-aonsecure-clk"
0013 - "sprd,sc9860-agcp-gate"
0014 - "sprd,sc9860-gpu-clk"
0015 - "sprd,sc9860-vsp-clk"
0016 - "sprd,sc9860-vsp-gate"
0017 - "sprd,sc9860-cam-clk"
0018 - "sprd,sc9860-cam-gate"
0019 - "sprd,sc9860-disp-clk"
0020 - "sprd,sc9860-disp-gate"
0021 - "sprd,sc9860-apapb-gate"
0022
0023 - #clock-cells: must be 1
0024
0025 - clocks : Should be the input parent clock(s) phandle for the clock, this
0026 property here just simply shows which clock group the clocks'
0027 parents are in, since each clk node would represent many clocks
0028 which are defined in the driver. The detailed dependency
0029 relationship (i.e. how many parents and which are the parents)
0030 are implemented in driver code.
0031
0032 Optional properties:
0033
0034 - reg: Contain the registers base address and length. It must be configured
0035 only if no 'sprd,syscon' under the node.
0036
0037 - sprd,syscon: phandle to the syscon which is in the same address area with
0038 the clock, and so we can get regmap for the clocks from the
0039 syscon device.
0040
0041 Example:
0042
0043 pmu_gate: pmu-gate {
0044 compatible = "sprd,sc9860-pmu-gate";
0045 sprd,syscon = <&pmu_regs>;
0046 clocks = <&ext_26m>;
0047 #clock-cells = <1>;
0048 };
0049
0050 pll: pll {
0051 compatible = "sprd,sc9860-pll";
0052 sprd,syscon = <&ana_regs>;
0053 clocks = <&pmu_gate 0>;
0054 #clock-cells = <1>;
0055 };
0056
0057 ap_clk: clock-controller@20000000 {
0058 compatible = "sprd,sc9860-ap-clk";
0059 reg = <0 0x20000000 0 0x400>;
0060 clocks = <&ext_26m>, <&pll 0>,
0061 <&pmu_gate 0>;
0062 #clock-cells = <1>;
0063 };
