0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/samsung,s5pv210-audss-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung S5Pv210 SoC Audio SubSystem clock controller
0008
0009 maintainers:
0010 - Chanwoo Choi <cw00.choi@samsung.com>
0011 - Krzysztof Kozlowski <krzk@kernel.org>
0012 - Sylwester Nawrocki <s.nawrocki@samsung.com>
0013 - Tomasz Figa <tomasz.figa@gmail.com>
0014
0015 description: |
0016 All available clocks are defined as preprocessor macros in
0017 include/dt-bindings/clock/s5pv210-audss.h header.
0018
0019 properties:
0020 compatible:
0021 const: samsung,s5pv210-audss-clock
0022
0023 clocks:
0024 minItems: 4
0025 items:
0026 - description:
0027 AHB bus clock of the Audio Subsystem.
0028 - description:
0029 Optional fixed rate PLL reference clock, parent of mout_audss. If not
0030 specified (i.e. xusbxti is used for PLL reference), it is fixed to a
0031 clock named "xxti".
0032 - description:
0033 Input PLL to the AudioSS block, parent of mout_audss.
0034 - description:
0035 Audio bus clock, parent of mout_i2s.
0036 - description:
0037 Optional external i2s clock, parent of mout_i2s. If not specified, it
0038 is fixed to a clock named "iiscdclk0".
0039
0040 clock-names:
0041 minItems: 4
0042 items:
0043 - const: hclk
0044 - const: xxti
0045 - const: fout_epll
0046 - const: sclk_audio0
0047 - const: iiscdclk0
0048
0049 "#clock-cells":
0050 const: 1
0051
0052 power-domains:
0053 maxItems: 1
0054
0055 reg:
0056 maxItems: 1
0057
0058 required:
0059 - compatible
0060 - clocks
0061 - clock-names
0062 - "#clock-cells"
0063 - reg
0064
0065 additionalProperties: false
0066
0067 examples:
0068 - |
0069 #include <dt-bindings/clock/s5pv210.h>
0070
0071 clock-controller@c0900000 {
0072 compatible = "samsung,s5pv210-audss-clock";
0073 reg = <0xc0900000 0x1000>;
0074 #clock-cells = <1>;
0075 clock-names = "hclk", "xxti", "fout_epll", "sclk_audio0";
0076 clocks = <&clocks DOUT_HCLKP>, <&xxti>, <&clocks FOUT_EPLL>,
0077 <&clocks SCLK_AUDIO0>;
0078 };
