0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/samsung,exynos850-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung Exynos850 SoC clock controller
0008
0009 maintainers:
0010 - Sam Protsenko <semen.protsenko@linaro.org>
0011 - Chanwoo Choi <cw00.choi@samsung.com>
0012 - Krzysztof Kozlowski <krzk@kernel.org>
0013 - Sylwester Nawrocki <s.nawrocki@samsung.com>
0014 - Tomasz Figa <tomasz.figa@gmail.com>
0015
0016 description: |
0017 Exynos850 clock controller is comprised of several CMU units, generating
0018 clocks for different domains. Those CMU units are modeled as separate device
0019 tree nodes, and might depend on each other. Root clocks in that clock tree are
0020 two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external
0021 clocks must be defined as fixed-rate clocks in dts.
0022
0023 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
0024 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
0025
0026 Each clock is assigned an identifier and client nodes can use this identifier
0027 to specify the clock which they consume. All clocks available for usage
0028 in clock consumer nodes are defined as preprocessor macros in
0029 'dt-bindings/clock/exynos850.h' header.
0030
0031 properties:
0032 compatible:
0033 enum:
0034 - samsung,exynos850-cmu-top
0035 - samsung,exynos850-cmu-apm
0036 - samsung,exynos850-cmu-cmgp
0037 - samsung,exynos850-cmu-core
0038 - samsung,exynos850-cmu-dpu
0039 - samsung,exynos850-cmu-hsi
0040 - samsung,exynos850-cmu-peri
0041
0042 clocks:
0043 minItems: 1
0044 maxItems: 5
0045
0046 clock-names:
0047 minItems: 1
0048 maxItems: 5
0049
0050 "#clock-cells":
0051 const: 1
0052
0053 reg:
0054 maxItems: 1
0055
0056 allOf:
0057 - if:
0058 properties:
0059 compatible:
0060 contains:
0061 const: samsung,exynos850-cmu-top
0062
0063 then:
0064 properties:
0065 clocks:
0066 items:
0067 - description: External reference clock (26 MHz)
0068
0069 clock-names:
0070 items:
0071 - const: oscclk
0072
0073 - if:
0074 properties:
0075 compatible:
0076 contains:
0077 const: samsung,exynos850-cmu-apm
0078
0079 then:
0080 properties:
0081 clocks:
0082 items:
0083 - description: External reference clock (26 MHz)
0084 - description: CMU_APM bus clock (from CMU_TOP)
0085
0086 clock-names:
0087 items:
0088 - const: oscclk
0089 - const: dout_clkcmu_apm_bus
0090
0091 - if:
0092 properties:
0093 compatible:
0094 contains:
0095 const: samsung,exynos850-cmu-cmgp
0096
0097 then:
0098 properties:
0099 clocks:
0100 items:
0101 - description: External reference clock (26 MHz)
0102 - description: CMU_CMGP bus clock (from CMU_APM)
0103
0104 clock-names:
0105 items:
0106 - const: oscclk
0107 - const: gout_clkcmu_cmgp_bus
0108
0109 - if:
0110 properties:
0111 compatible:
0112 contains:
0113 const: samsung,exynos850-cmu-core
0114
0115 then:
0116 properties:
0117 clocks:
0118 items:
0119 - description: External reference clock (26 MHz)
0120 - description: CMU_CORE bus clock (from CMU_TOP)
0121 - description: CCI clock (from CMU_TOP)
0122 - description: eMMC clock (from CMU_TOP)
0123 - description: SSS clock (from CMU_TOP)
0124
0125 clock-names:
0126 items:
0127 - const: oscclk
0128 - const: dout_core_bus
0129 - const: dout_core_cci
0130 - const: dout_core_mmc_embd
0131 - const: dout_core_sss
0132
0133 - if:
0134 properties:
0135 compatible:
0136 contains:
0137 const: samsung,exynos850-cmu-dpu
0138
0139 then:
0140 properties:
0141 clocks:
0142 items:
0143 - description: External reference clock (26 MHz)
0144 - description: DPU clock (from CMU_TOP)
0145
0146 clock-names:
0147 items:
0148 - const: oscclk
0149 - const: dout_dpu
0150
0151 - if:
0152 properties:
0153 compatible:
0154 contains:
0155 const: samsung,exynos850-cmu-hsi
0156
0157 then:
0158 properties:
0159 clocks:
0160 items:
0161 - description: External reference clock (26 MHz)
0162 - description: External RTC clock (32768 Hz)
0163 - description: CMU_HSI bus clock (from CMU_TOP)
0164 - description: SD card clock (from CMU_TOP)
0165 - description: "USB 2.0 DRD clock (from CMU_TOP)"
0166
0167 clock-names:
0168 items:
0169 - const: oscclk
0170 - const: rtcclk
0171 - const: dout_hsi_bus
0172 - const: dout_hsi_mmc_card
0173 - const: dout_hsi_usb20drd
0174
0175 - if:
0176 properties:
0177 compatible:
0178 contains:
0179 const: samsung,exynos850-cmu-peri
0180
0181 then:
0182 properties:
0183 clocks:
0184 items:
0185 - description: External reference clock (26 MHz)
0186 - description: CMU_PERI bus clock (from CMU_TOP)
0187 - description: UART clock (from CMU_TOP)
0188 - description: Parent clock for HSI2C and SPI (from CMU_TOP)
0189
0190 clock-names:
0191 items:
0192 - const: oscclk
0193 - const: dout_peri_bus
0194 - const: dout_peri_uart
0195 - const: dout_peri_ip
0196
0197 required:
0198 - compatible
0199 - "#clock-cells"
0200 - clocks
0201 - clock-names
0202 - reg
0203
0204 additionalProperties: false
0205
0206 examples:
0207 # Clock controller node for CMU_PERI
0208 - |
0209 #include <dt-bindings/clock/exynos850.h>
0210
0211 cmu_peri: clock-controller@10030000 {
0212 compatible = "samsung,exynos850-cmu-peri";
0213 reg = <0x10030000 0x8000>;
0214 #clock-cells = <1>;
0215
0216 clocks = <&oscclk>, <&cmu_top CLK_DOUT_PERI_BUS>,
0217 <&cmu_top CLK_DOUT_PERI_UART>,
0218 <&cmu_top CLK_DOUT_PERI_IP>;
0219 clock-names = "oscclk", "dout_peri_bus",
0220 "dout_peri_uart", "dout_peri_ip";
0221 };
0222
0223 ...
