0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung Exynos7885 SoC clock controller
0008
0009 maintainers:
0010 - Dávid Virág <virag.david003@gmail.com>
0011 - Chanwoo Choi <cw00.choi@samsung.com>
0012 - Krzysztof Kozlowski <krzk@kernel.org>
0013 - Sylwester Nawrocki <s.nawrocki@samsung.com>
0014 - Tomasz Figa <tomasz.figa@gmail.com>
0015
0016 description: |
0017 Exynos7885 clock controller is comprised of several CMU units, generating
0018 clocks for different domains. Those CMU units are modeled as separate device
0019 tree nodes, and might depend on each other. The root clock in that root tree
0020 is an external clock: OSCCLK (26 MHz). This external clock must be defined
0021 as a fixed-rate clock in dts.
0022
0023 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
0024 dividers; all other leaf clocks (other CMUs) are usually derived from CMU_TOP.
0025
0026 Each clock is assigned an identifier and client nodes can use this identifier
0027 to specify the clock which they consume. All clocks available for usage
0028 in clock consumer nodes are defined as preprocessor macros in
0029 'dt-bindings/clock/exynos7885.h' header.
0030
0031 properties:
0032 compatible:
0033 enum:
0034 - samsung,exynos7885-cmu-top
0035 - samsung,exynos7885-cmu-core
0036 - samsung,exynos7885-cmu-fsys
0037 - samsung,exynos7885-cmu-peri
0038
0039 clocks:
0040 minItems: 1
0041 maxItems: 10
0042
0043 clock-names:
0044 minItems: 1
0045 maxItems: 10
0046
0047 "#clock-cells":
0048 const: 1
0049
0050 reg:
0051 maxItems: 1
0052
0053 allOf:
0054 - if:
0055 properties:
0056 compatible:
0057 contains:
0058 const: samsung,exynos7885-cmu-top
0059
0060 then:
0061 properties:
0062 clocks:
0063 items:
0064 - description: External reference clock (26 MHz)
0065
0066 clock-names:
0067 items:
0068 - const: oscclk
0069
0070 - if:
0071 properties:
0072 compatible:
0073 contains:
0074 const: samsung,exynos7885-cmu-core
0075
0076 then:
0077 properties:
0078 clocks:
0079 items:
0080 - description: External reference clock (26 MHz)
0081 - description: CMU_CORE bus clock (from CMU_TOP)
0082 - description: CCI clock (from CMU_TOP)
0083 - description: G3D clock (from CMU_TOP)
0084
0085 clock-names:
0086 items:
0087 - const: oscclk
0088 - const: dout_core_bus
0089 - const: dout_core_cci
0090 - const: dout_core_g3d
0091
0092 - if:
0093 properties:
0094 compatible:
0095 contains:
0096 const: samsung,exynos7885-cmu-fsys
0097
0098 then:
0099 properties:
0100 clocks:
0101 items:
0102 - description: External reference clock (26 MHz)
0103 - description: CMU_FSYS bus clock (from CMU_TOP)
0104 - description: MMC_CARD clock (from CMU_TOP)
0105 - description: MMC_EMBD clock (from CMU_TOP)
0106 - description: MMC_SDIO clock (from CMU_TOP)
0107 - description: USB30DRD clock (from CMU_TOP)
0108
0109 clock-names:
0110 items:
0111 - const: oscclk
0112 - const: dout_fsys_bus
0113 - const: dout_fsys_mmc_card
0114 - const: dout_fsys_mmc_embd
0115 - const: dout_fsys_mmc_sdio
0116 - const: dout_fsys_usb30drd
0117
0118 - if:
0119 properties:
0120 compatible:
0121 contains:
0122 const: samsung,exynos7885-cmu-peri
0123
0124 then:
0125 properties:
0126 clocks:
0127 items:
0128 - description: External reference clock (26 MHz)
0129 - description: CMU_PERI bus clock (from CMU_TOP)
0130 - description: SPI0 clock (from CMU_TOP)
0131 - description: SPI1 clock (from CMU_TOP)
0132 - description: UART0 clock (from CMU_TOP)
0133 - description: UART1 clock (from CMU_TOP)
0134 - description: UART2 clock (from CMU_TOP)
0135 - description: USI0 clock (from CMU_TOP)
0136 - description: USI1 clock (from CMU_TOP)
0137 - description: USI2 clock (from CMU_TOP)
0138
0139 clock-names:
0140 items:
0141 - const: oscclk
0142 - const: dout_peri_bus
0143 - const: dout_peri_spi0
0144 - const: dout_peri_spi1
0145 - const: dout_peri_uart0
0146 - const: dout_peri_uart1
0147 - const: dout_peri_uart2
0148 - const: dout_peri_usi0
0149 - const: dout_peri_usi1
0150 - const: dout_peri_usi2
0151
0152 required:
0153 - compatible
0154 - "#clock-cells"
0155 - clocks
0156 - clock-names
0157 - reg
0158
0159 additionalProperties: false
0160
0161 examples:
0162 # Clock controller node for CMU_PERI
0163 - |
0164 #include <dt-bindings/clock/exynos7885.h>
0165
0166 cmu_peri: clock-controller@10010000 {
0167 compatible = "samsung,exynos7885-cmu-peri";
0168 reg = <0x10010000 0x8000>;
0169 #clock-cells = <1>;
0170
0171 clocks = <&oscclk>,
0172 <&cmu_top CLK_DOUT_PERI_BUS>,
0173 <&cmu_top CLK_DOUT_PERI_SPI0>,
0174 <&cmu_top CLK_DOUT_PERI_SPI1>,
0175 <&cmu_top CLK_DOUT_PERI_UART0>,
0176 <&cmu_top CLK_DOUT_PERI_UART1>,
0177 <&cmu_top CLK_DOUT_PERI_UART2>,
0178 <&cmu_top CLK_DOUT_PERI_USI0>,
0179 <&cmu_top CLK_DOUT_PERI_USI1>,
0180 <&cmu_top CLK_DOUT_PERI_USI2>;
0181 clock-names = "oscclk",
0182 "dout_peri_bus",
0183 "dout_peri_spi0",
0184 "dout_peri_spi1",
0185 "dout_peri_uart0",
0186 "dout_peri_uart1",
0187 "dout_peri_uart2",
0188 "dout_peri_usi0",
0189 "dout_peri_usi1",
0190 "dout_peri_usi2";
0191 };
0192
0193 ...
