bindings/clock/samsung%2Cexynos5410-clock.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/samsung,exynos5410-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung Exynos5410 SoC clock controller
0008
0009 maintainers:
0010   - Chanwoo Choi <cw00.choi@samsung.com>
0011   - Krzysztof Kozlowski <krzk@kernel.org>
0012   - Sylwester Nawrocki <s.nawrocki@samsung.com>
0013   - Tomasz Figa <tomasz.figa@gmail.com>
0014
0015 description: |
0016   Expected external clocks, defined in DTS as fixed-rate clocks with a matching
0017   name::
0018     - "fin_pll" - PLL input clock from XXTI
0019
0020   All available clocks are defined as preprocessor macros in
0021   include/dt-bindings/clock/exynos5410.h header.
0022
0023 properties:
0024   compatible:
0025     oneOf:
0026       - enum:
0027           - samsung,exynos5410-clock
0028
0029   clocks:
0030     description:
0031       Should contain an entry specifying the root clock from external
0032       oscillator supplied through XXTI or XusbXTI pin.  This clock should be
0033       defined using standard clock bindings with "fin_pll" clock-output-name.
0034       That clock is being passed internally to the 9 PLLs.
0035     maxItems: 1
0036
0037   "#clock-cells":
0038     const: 1
0039
0040   reg:
0041     maxItems: 1
0042
0043 required:
0044   - compatible
0045   - "#clock-cells"
0046   - reg
0047
0048 additionalProperties: false
0049
0050 examples:
0051   - |
0052     #include <dt-bindings/clock/exynos5410.h>
0053
0054     fin_pll: osc-clock {
0055         compatible = "fixed-clock";
0056         clock-frequency = <24000000>;
0057         clock-output-names = "fin_pll";
0058         #clock-cells = <0>;
0059     };
0060
0061     clock-controller@10010000 {
0062         compatible = "samsung,exynos5410-clock";
0063         reg = <0x10010000 0x30000>;
0064         #clock-cells = <1>;
0065         clocks = <&fin_pll>;
0066     };