0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/rockchip,rk3368-cru.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Rockchip RK3368 Clock and Reset Unit (CRU)
0008
0009 maintainers:
0010 - Elaine Zhang <zhangqing@rock-chips.com>
0011 - Heiko Stuebner <heiko@sntech.de>
0012
0013 description: |
0014 The RK3368 clock controller generates and supplies clocks to various
0015 controllers within the SoC and also implements a reset controller for SoC
0016 peripherals.
0017 Each clock is assigned an identifier and client nodes can use this identifier
0018 to specify the clock which they consume. All available clocks are defined as
0019 preprocessor macros in the dt-bindings/clock/rk3368-cru.h headers and can be
0020 used in device tree sources. Similar macros exist for the reset sources in
0021 these files.
0022 There are several clocks that are generated outside the SoC. It is expected
0023 that they are defined using standard clock bindings with following
0024 clock-output-names:
0025 - "xin24m" - crystal input - required
0026 - "xin32k" - rtc clock - optional
0027 - "ext_i2s" - external I2S clock - optional
0028 - "ext_gmac" - external GMAC clock - optional
0029 - "ext_hsadc" - external HSADC clock - optional
0030 - "ext_isp" - external ISP clock - optional
0031 - "ext_jtag" - external JTAG clock - optional
0032 - "ext_vip" - external VIP clock - optional
0033 - "usbotg_out" - output clock of the pll in the otg phy
0034
0035 properties:
0036 compatible:
0037 enum:
0038 - rockchip,rk3368-cru
0039
0040 reg:
0041 maxItems: 1
0042
0043 "#clock-cells":
0044 const: 1
0045
0046 "#reset-cells":
0047 const: 1
0048
0049 clocks:
0050 maxItems: 1
0051
0052 clock-names:
0053 const: xin24m
0054
0055 rockchip,grf:
0056 $ref: /schemas/types.yaml#/definitions/phandle
0057 description:
0058 Phandle to the syscon managing the "general register files" (GRF),
0059 if missing pll rates are not changeable, due to the missing pll
0060 lock status.
0061
0062 required:
0063 - compatible
0064 - reg
0065 - "#clock-cells"
0066 - "#reset-cells"
0067
0068 additionalProperties: false
0069
0070 examples:
0071 - |
0072 cru: clock-controller@ff760000 {
0073 compatible = "rockchip,rk3368-cru";
0074 reg = <0xff760000 0x1000>;
0075 rockchip,grf = <&grf>;
0076 #clock-cells = <1>;
0077 #reset-cells = <1>;
0078 };
