0001 * Rockchip RK3126/RK3128 Clock and Reset Unit
0002
0003 The RK3126/RK3128 clock controller generates and supplies clock to various
0004 controllers within the SoC and also implements a reset controller for SoC
0005 peripherals.
0006
0007 Required Properties:
0008
0009 - compatible: should be "rockchip,rk3126-cru" or "rockchip,rk3128-cru"
0010 "rockchip,rk3126-cru" - controller compatible with RK3126 SoC.
0011 "rockchip,rk3128-cru" - controller compatible with RK3128 SoC.
0012 - reg: physical base address of the controller and length of memory mapped
0013 region.
0014 - #clock-cells: should be 1.
0015 - #reset-cells: should be 1.
0016
0017 Optional Properties:
0018
0019 - rockchip,grf: phandle to the syscon managing the "general register files"
0020 If missing pll rates are not changeable, due to the missing pll lock status.
0021
0022 Each clock is assigned an identifier and client nodes can use this identifier
0023 to specify the clock which they consume. All available clocks are defined as
0024 preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be
0025 used in device tree sources. Similar macros exist for the reset sources in
0026 these files.
0027
0028 External clocks:
0029
0030 There are several clocks that are generated outside the SoC. It is expected
0031 that they are defined using standard clock bindings with following
0032 clock-output-names:
0033 - "xin24m" - crystal input - required,
0034 - "ext_i2s" - external I2S clock - optional,
0035 - "gmac_clkin" - external GMAC clock - optional
0036
0037 Example: Clock controller node:
0038
0039 cru: cru@20000000 {
0040 compatible = "rockchip,rk3128-cru";
0041 reg = <0x20000000 0x1000>;
0042 rockchip,grf = <&grf>;
0043
0044 #clock-cells = <1>;
0045 #reset-cells = <1>;
0046 };
0047
0048 Example: UART controller node that consumes the clock generated by the clock
0049 controller:
0050
0051 uart2: serial@20068000 {
0052 compatible = "rockchip,serial";
0053 reg = <0x20068000 0x100>;
0054 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
0055 clock-frequency = <24000000>;
0056 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
0057 clock-names = "sclk_uart", "pclk_uart";
0058 };
