0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Rockchip RK3036 Clock and Reset Unit (CRU)
0008
0009 maintainers:
0010 - Elaine Zhang <zhangqing@rock-chips.com>
0011 - Heiko Stuebner <heiko@sntech.de>
0012
0013 description: |
0014 The RK3036 clock controller generates and supplies clocks to various
0015 controllers within the SoC and also implements a reset controller for SoC
0016 peripherals.
0017 Each clock is assigned an identifier and client nodes can use this identifier
0018 to specify the clock which they consume. All available clocks are defined as
0019 preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be
0020 used in device tree sources. Similar macros exist for the reset sources in
0021 these files.
0022 There are several clocks that are generated outside the SoC. It is expected
0023 that they are defined using standard clock bindings with following
0024 clock-output-names:
0025 - "xin24m" - crystal input - required
0026 - "ext_i2s" - external I2S clock - optional
0027 - "rmii_clkin" - external EMAC clock - optional
0028
0029 properties:
0030 compatible:
0031 enum:
0032 - rockchip,rk3036-cru
0033
0034 reg:
0035 maxItems: 1
0036
0037 "#clock-cells":
0038 const: 1
0039
0040 "#reset-cells":
0041 const: 1
0042
0043 clocks:
0044 maxItems: 1
0045
0046 clock-names:
0047 const: xin24m
0048
0049 rockchip,grf:
0050 $ref: /schemas/types.yaml#/definitions/phandle
0051 description:
0052 Phandle to the syscon managing the "general register files" (GRF),
0053 if missing pll rates are not changeable, due to the missing pll
0054 lock status.
0055
0056 required:
0057 - compatible
0058 - reg
0059 - "#clock-cells"
0060 - "#reset-cells"
0061
0062 additionalProperties: false
0063
0064 examples:
0065 - |
0066 cru: clock-controller@20000000 {
0067 compatible = "rockchip,rk3036-cru";
0068 reg = <0x20000000 0x1000>;
0069 rockchip,grf = <&grf>;
0070 #clock-cells = <1>;
0071 #reset-cells = <1>;
0072 };