0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/renesas,cpg-clocks.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas Clock Pulse Generator (CPG)
0008
0009 maintainers:
0010 - Geert Uytterhoeven <geert+renesas@glider.be>
0011
0012 description:
0013 The Clock Pulse Generator (CPG) generates core clocks for the SoC. It
0014 includes PLLs, and fixed and variable ratio dividers.
0015
0016 The CPG may also provide a Clock Domain for SoC devices, in combination with
0017 the CPG Module Stop (MSTP) Clocks.
0018
0019 properties:
0020 compatible:
0021 oneOf:
0022 - const: renesas,r8a73a4-cpg-clocks # R-Mobile APE6
0023 - const: renesas,r8a7740-cpg-clocks # R-Mobile A1
0024 - const: renesas,r8a7778-cpg-clocks # R-Car M1
0025 - const: renesas,r8a7779-cpg-clocks # R-Car H1
0026 - items:
0027 - enum:
0028 - renesas,r7s72100-cpg-clocks # RZ/A1H
0029 - const: renesas,rz-cpg-clocks # RZ/A1
0030 - const: renesas,sh73a0-cpg-clocks # SH-Mobile AG5
0031
0032 reg:
0033 maxItems: 1
0034
0035 clocks: true
0036
0037 '#clock-cells':
0038 const: 1
0039
0040 clock-output-names: true
0041
0042 renesas,mode:
0043 description: Board-specific settings of the MD_CK* bits on R-Mobile A1
0044 $ref: /schemas/types.yaml#/definitions/uint32
0045 minimum: 0
0046 maximum: 7
0047
0048 '#power-domain-cells':
0049 const: 0
0050
0051 required:
0052 - compatible
0053 - reg
0054 - clocks
0055 - '#clock-cells'
0056 - clock-output-names
0057
0058 allOf:
0059 - if:
0060 properties:
0061 compatible:
0062 contains:
0063 const: renesas,r8a73a4-cpg-clocks
0064 then:
0065 properties:
0066 clocks:
0067 items:
0068 - description: extal1
0069 - description: extal2
0070
0071 clock-output-names:
0072 items:
0073 - const: main
0074 - const: pll0
0075 - const: pll1
0076 - const: pll2
0077 - const: pll2s
0078 - const: pll2h
0079 - const: z
0080 - const: z2
0081 - const: i
0082 - const: m3
0083 - const: b
0084 - const: m1
0085 - const: m2
0086 - const: zx
0087 - const: zs
0088 - const: hp
0089
0090 - if:
0091 properties:
0092 compatible:
0093 contains:
0094 const: renesas,r8a7740-cpg-clocks
0095 then:
0096 properties:
0097 clocks:
0098 items:
0099 - description: extal1
0100 - description: extal2
0101 - description: extalr
0102
0103 clock-output-names:
0104 items:
0105 - const: system
0106 - const: pllc0
0107 - const: pllc1
0108 - const: pllc2
0109 - const: r
0110 - const: usb24s
0111 - const: i
0112 - const: zg
0113 - const: b
0114 - const: m1
0115 - const: hp
0116 - const: hpp
0117 - const: usbp
0118 - const: s
0119 - const: zb
0120 - const: m3
0121 - const: cp
0122
0123 required:
0124 - renesas,mode
0125
0126 - if:
0127 properties:
0128 compatible:
0129 contains:
0130 const: renesas,r8a7778-cpg-clocks
0131 then:
0132 properties:
0133 clocks:
0134 maxItems: 1
0135
0136 clock-output-names:
0137 items:
0138 - const: plla
0139 - const: pllb
0140 - const: b
0141 - const: out
0142 - const: p
0143 - const: s
0144 - const: s1
0145
0146 - if:
0147 properties:
0148 compatible:
0149 contains:
0150 const: renesas,r8a7779-cpg-clocks
0151 then:
0152 properties:
0153 clocks:
0154 maxItems: 1
0155
0156 clock-output-names:
0157 items:
0158 - const: plla
0159 - const: z
0160 - const: zs
0161 - const: s
0162 - const: s1
0163 - const: p
0164 - const: b
0165 - const: out
0166
0167 - if:
0168 properties:
0169 compatible:
0170 contains:
0171 const: renesas,r7s72100-cpg-clocks
0172 then:
0173 properties:
0174 clocks:
0175 items:
0176 - description: extal1
0177 - description: usb_x1
0178
0179 clock-output-names:
0180 items:
0181 - const: pll
0182 - const: i
0183 - const: g
0184
0185 - if:
0186 properties:
0187 compatible:
0188 contains:
0189 const: renesas,sh73a0-cpg-clocks
0190 then:
0191 properties:
0192 clocks:
0193 items:
0194 - description: extal1
0195 - description: extal2
0196
0197 clock-output-names:
0198 items:
0199 - const: main
0200 - const: pll0
0201 - const: pll1
0202 - const: pll2
0203 - const: pll3
0204 - const: dsi0phy
0205 - const: dsi1phy
0206 - const: zg
0207 - const: m3
0208 - const: b
0209 - const: m1
0210 - const: m2
0211 - const: z
0212 - const: zx
0213 - const: hp
0214
0215 - if:
0216 properties:
0217 compatible:
0218 contains:
0219 enum:
0220 - renesas,r8a7778-cpg-clocks
0221 - renesas,r8a7779-cpg-clocks
0222 - renesas,rz-cpg-clocks
0223 then:
0224 required:
0225 - '#power-domain-cells'
0226
0227 additionalProperties: false
0228
0229 examples:
0230 - |
0231 #include <dt-bindings/clock/r8a7740-clock.h>
0232 cpg_clocks: cpg_clocks@e6150000 {
0233 compatible = "renesas,r8a7740-cpg-clocks";
0234 reg = <0xe6150000 0x10000>;
0235 clocks = <&extal1_clk>, <&extal2_clk>, <&extalr_clk>;
0236 #clock-cells = <1>;
0237 clock-output-names = "system", "pllc0", "pllc1", "pllc2", "r",
0238 "usb24s", "i", "zg", "b", "m1", "hp", "hpp",
0239 "usbp", "s", "zb", "m3", "cp";
0240 renesas,mode = <0x05>;
0241 };
