0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/renesas,9series.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Binding for Renesas 9-series I2C PCIe clock generators
0008
0009 description: |
0010 The Renesas 9-series are I2C PCIe clock generators providing
0011 from 1 to 20 output clocks.
0012
0013 When referencing the provided clock in the DT using phandle
0014 and clock specifier, the following mapping applies:
0015
0016 - 9FGV0241:
0017 0 -- DIF0
0018 1 -- DIF1
0019
0020 maintainers:
0021 - Marek Vasut <marex@denx.de>
0022
0023 properties:
0024 compatible:
0025 enum:
0026 - renesas,9fgv0241
0027
0028 reg:
0029 description: I2C device address
0030 enum: [ 0x68, 0x6a ]
0031
0032 '#clock-cells':
0033 const: 1
0034
0035 clocks:
0036 items:
0037 - description: XTal input clock
0038
0039 renesas,out-amplitude-microvolt:
0040 enum: [ 600000, 700000, 800000, 900000 ]
0041 description: Output clock signal amplitude
0042
0043 renesas,out-spread-spectrum:
0044 $ref: /schemas/types.yaml#/definitions/uint32
0045 enum: [ 100000, 99750, 99500 ]
0046 description: Output clock down spread in pcm (1/1000 of percent)
0047
0048 patternProperties:
0049 "^DIF[0-19]$":
0050 type: object
0051 description:
0052 Description of one of the outputs (DIF0..DIF19).
0053
0054 properties:
0055 renesas,slew-rate:
0056 $ref: /schemas/types.yaml#/definitions/uint32
0057 enum: [ 2000000, 3000000 ]
0058 description: Output clock slew rate select in V/ns
0059
0060 additionalProperties: false
0061
0062 required:
0063 - compatible
0064 - reg
0065 - clocks
0066 - '#clock-cells'
0067
0068 additionalProperties: false
0069
0070 examples:
0071 - |
0072 /* 25MHz reference crystal */
0073 ref25: ref25m {
0074 compatible = "fixed-clock";
0075 #clock-cells = <0>;
0076 clock-frequency = <25000000>;
0077 };
0078
0079 i2c@0 {
0080 reg = <0x0 0x100>;
0081 #address-cells = <1>;
0082 #size-cells = <0>;
0083
0084 rs9: clock-generator@6a {
0085 compatible = "renesas,9fgv0241";
0086 reg = <0x6a>;
0087 #clock-cells = <1>;
0088
0089 clocks = <&ref25m>;
0090
0091 DIF0 {
0092 renesas,slew-rate = <3000000>;
0093 };
0094 };
0095 };
0096
0097 ...
