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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Qualcomm Video Clock & Reset Controller Binding
0008 
0009 maintainers:
0010   - Taniya Das <tdas@codeaurora.org>
0011 
0012 description: |
0013   Qualcomm video clock control module which supports the clocks, resets and
0014   power domains on Qualcomm SoCs.
0015 
0016   See also:
0017     dt-bindings/clock/qcom,videocc-sc7180.h
0018     dt-bindings/clock/qcom,videocc-sc7280.h
0019     dt-bindings/clock/qcom,videocc-sdm845.h
0020     dt-bindings/clock/qcom,videocc-sm8150.h
0021     dt-bindings/clock/qcom,videocc-sm8250.h
0022 
0023 properties:
0024   compatible:
0025     enum:
0026       - qcom,sc7180-videocc
0027       - qcom,sc7280-videocc
0028       - qcom,sdm845-videocc
0029       - qcom,sm8150-videocc
0030       - qcom,sm8250-videocc
0031 
0032   clocks:
0033     items:
0034       - description: Board XO source
0035 
0036   clock-names:
0037     items:
0038       - const: bi_tcxo
0039 
0040   '#clock-cells':
0041     const: 1
0042 
0043   '#reset-cells':
0044     const: 1
0045 
0046   '#power-domain-cells':
0047     const: 1
0048 
0049   reg:
0050     maxItems: 1
0051 
0052   power-domains:
0053     description:
0054       A phandle and PM domain specifier for the MMCX power domain.
0055     maxItems: 1
0056 
0057   required-opps:
0058     description:
0059       A phandle to an OPP node describing required MMCX performance point.
0060     maxItems: 1
0061 
0062 required:
0063   - compatible
0064   - reg
0065   - clocks
0066   - clock-names
0067   - '#clock-cells'
0068   - '#reset-cells'
0069   - '#power-domain-cells'
0070 
0071 additionalProperties: false
0072 
0073 examples:
0074   - |
0075     #include <dt-bindings/clock/qcom,rpmh.h>
0076     #include <dt-bindings/power/qcom-rpmpd.h>
0077     clock-controller@ab00000 {
0078       compatible = "qcom,sdm845-videocc";
0079       reg = <0x0ab00000 0x10000>;
0080       clocks = <&rpmhcc RPMH_CXO_CLK>;
0081       clock-names = "bi_tcxo";
0082       #clock-cells = <1>;
0083       #reset-cells = <1>;
0084       #power-domain-cells = <1>;
0085       power-domains = <&rpmhpd SM8250_MMCX>;
0086       required-opps = <&rpmhpd_opp_low_svs>;
0087     };
0088 ...