0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm Camera Clock & Reset Controller Binding for SM8450
0008
0009 maintainers:
0010 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
0011
0012 description: |
0013 Qualcomm camera clock control module which supports the clocks, resets and
0014 power domains on SM8450.
0015
0016 See also include/dt-bindings/clock/qcom,sm8450-camcc.h
0017
0018 properties:
0019 compatible:
0020 const: qcom,sm8450-camcc
0021
0022 clocks:
0023 items:
0024 - description: Camera AHB clock from GCC
0025 - description: Board XO source
0026 - description: Board active XO source
0027 - description: Sleep clock source
0028
0029 power-domains:
0030 maxItems: 1
0031 description:
0032 A phandle and PM domain specifier for the MMCX power domain.
0033
0034 required-opps:
0035 description:
0036 A phandle to an OPP node describing required MMCX performance point.
0037
0038 '#clock-cells':
0039 const: 1
0040
0041 '#reset-cells':
0042 const: 1
0043
0044 '#power-domain-cells':
0045 const: 1
0046
0047 reg:
0048 maxItems: 1
0049
0050 required:
0051 - compatible
0052 - reg
0053 - clocks
0054 - power-domains
0055 - required-opps
0056 - '#clock-cells'
0057 - '#reset-cells'
0058 - '#power-domain-cells'
0059
0060 additionalProperties: false
0061
0062 examples:
0063 - |
0064 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
0065 #include <dt-bindings/clock/qcom,rpmh.h>
0066 #include <dt-bindings/power/qcom-rpmpd.h>
0067 clock-controller@ade0000 {
0068 compatible = "qcom,sm8450-camcc";
0069 reg = <0xade0000 0x20000>;
0070 clocks = <&gcc GCC_CAMERA_AHB_CLK>,
0071 <&rpmhcc RPMH_CXO_CLK>,
0072 <&rpmhcc RPMH_CXO_CLK_A>,
0073 <&sleep_clk>;
0074 power-domains = <&rpmhpd SM8450_MMCX>;
0075 required-opps = <&rpmhpd_opp_low_svs>;
0076 #clock-cells = <1>;
0077 #reset-cells = <1>;
0078 #power-domain-cells = <1>;
0079 };
0080 ...
