0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,sc7180-lpasscorecc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm LPASS Core Clock Controller Binding for SC7180
0008
0009 maintainers:
0010 - Taniya Das <tdas@codeaurora.org>
0011
0012 description: |
0013 Qualcomm LPASS core clock control module which supports the clocks and
0014 power domains on SC7180.
0015
0016 See also:
0017 - dt-bindings/clock/qcom,lpasscorecc-sc7180.h
0018
0019 properties:
0020 compatible:
0021 enum:
0022 - qcom,sc7180-lpasshm
0023 - qcom,sc7180-lpasscorecc
0024
0025 clocks:
0026 items:
0027 - description: gcc_lpass_sway clock from GCC
0028 - description: Board XO source
0029
0030 clock-names:
0031 items:
0032 - const: iface
0033 - const: bi_tcxo
0034
0035 power-domains:
0036 maxItems: 1
0037
0038 '#clock-cells':
0039 const: 1
0040
0041 '#power-domain-cells':
0042 const: 1
0043
0044 reg:
0045 minItems: 1
0046 items:
0047 - description: lpass core cc register
0048 - description: lpass audio cc register
0049
0050 reg-names:
0051 items:
0052 - const: lpass_core_cc
0053 - const: lpass_audio_cc
0054
0055 if:
0056 properties:
0057 compatible:
0058 contains:
0059 const: qcom,sc7180-lpasshm
0060 then:
0061 properties:
0062 reg:
0063 maxItems: 1
0064
0065 else:
0066 properties:
0067 reg:
0068 minItems: 2
0069
0070 required:
0071 - compatible
0072 - reg
0073 - clocks
0074 - clock-names
0075 - '#clock-cells'
0076 - '#power-domain-cells'
0077
0078 additionalProperties: false
0079
0080 examples:
0081 - |
0082 #include <dt-bindings/clock/qcom,rpmh.h>
0083 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
0084 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
0085 clock-controller@63000000 {
0086 compatible = "qcom,sc7180-lpasshm";
0087 reg = <0x63000000 0x28>;
0088 clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, <&rpmhcc RPMH_CXO_CLK>;
0089 clock-names = "iface", "bi_tcxo";
0090 #clock-cells = <1>;
0091 #power-domain-cells = <1>;
0092 };
0093
0094 - |
0095 #include <dt-bindings/clock/qcom,rpmh.h>
0096 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
0097 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
0098 clock-controller@62d00000 {
0099 compatible = "qcom,sc7180-lpasscorecc";
0100 reg = <0x62d00000 0x50000>, <0x62780000 0x30000>;
0101 reg-names = "lpass_core_cc", "lpass_audio_cc";
0102 clocks = <&gcc GCC_LPASS_CFG_NOC_SWAY_CLK>, <&rpmhcc RPMH_CXO_CLK>;
0103 clock-names = "iface", "bi_tcxo";
0104 power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
0105 #clock-cells = <1>;
0106 #power-domain-cells = <1>;
0107 };
0108 ...
