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OSCL-LXR

 
 

    


0001 Qualcomm LPASS Clock Controller Binding
0002 -----------------------------------------------
0003 
0004 Required properties :
0005 - compatible            : shall contain "qcom,sdm845-lpasscc"
0006 - #clock-cells          : from common clock binding, shall contain 1.
0007 - reg                   : shall contain base register address and size,
0008                           in the order
0009                         Index-0 maps to LPASS_CC register region
0010                         Index-1 maps to LPASS_QDSP6SS register region
0011 
0012 Optional properties :
0013 - reg-names     : register names of LPASS domain
0014                  "cc", "qdsp6ss".
0015 
0016 Example:
0017 
0018 The below node has to be defined in the cases where the LPASS peripheral loader
0019 would bring the subsystem out of reset.
0020 
0021         lpasscc: clock-controller@17014000 {
0022                 compatible = "qcom,sdm845-lpasscc";
0023                 reg = <0x17014000 0x1f004>, <0x17300000 0x200>;
0024                 reg-names = "cc", "qdsp6ss";
0025                 #clock-cells = <1>;
0026         };