0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm Graphics Clock & Reset Controller Binding
0008
0009 maintainers:
0010 - Taniya Das <tdas@codeaurora.org>
0011
0012 description: |
0013 Qualcomm graphics clock control module which supports the clocks, resets and
0014 power domains on Qualcomm SoCs.
0015
0016 See also:
0017 dt-bindings/clock/qcom,gpucc-sdm845.h
0018 dt-bindings/clock/qcom,gpucc-sc7180.h
0019 dt-bindings/clock/qcom,gpucc-sc7280.h
0020 dt-bindings/clock/qcom,gpucc-sm6350.h
0021 dt-bindings/clock/qcom,gpucc-sm8150.h
0022 dt-bindings/clock/qcom,gpucc-sm8250.h
0023
0024 properties:
0025 compatible:
0026 enum:
0027 - qcom,sdm845-gpucc
0028 - qcom,sc7180-gpucc
0029 - qcom,sc7280-gpucc
0030 - qcom,sc8180x-gpucc
0031 - qcom,sm6350-gpucc
0032 - qcom,sm8150-gpucc
0033 - qcom,sm8250-gpucc
0034
0035 clocks:
0036 items:
0037 - description: Board XO source
0038 - description: GPLL0 main branch source
0039 - description: GPLL0 div branch source
0040
0041 clock-names:
0042 items:
0043 - const: bi_tcxo
0044 - const: gcc_gpu_gpll0_clk_src
0045 - const: gcc_gpu_gpll0_div_clk_src
0046
0047 '#clock-cells':
0048 const: 1
0049
0050 '#reset-cells':
0051 const: 1
0052
0053 '#power-domain-cells':
0054 const: 1
0055
0056 reg:
0057 maxItems: 1
0058
0059 required:
0060 - compatible
0061 - reg
0062 - clocks
0063 - clock-names
0064 - '#clock-cells'
0065 - '#reset-cells'
0066 - '#power-domain-cells'
0067
0068 additionalProperties: false
0069
0070 examples:
0071 - |
0072 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
0073 #include <dt-bindings/clock/qcom,rpmh.h>
0074 clock-controller@5090000 {
0075 compatible = "qcom,sdm845-gpucc";
0076 reg = <0x05090000 0x9000>;
0077 clocks = <&rpmhcc RPMH_CXO_CLK>,
0078 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
0079 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
0080 clock-names = "bi_tcxo",
0081 "gcc_gpu_gpll0_clk_src",
0082 "gcc_gpu_gpll0_div_clk_src";
0083 #clock-cells = <1>;
0084 #reset-cells = <1>;
0085 #power-domain-cells = <1>;
0086 };
0087 ...
