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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Qualcomm Global Clock & Reset Controller Binding for SM6125
0008 
0009 maintainers:
0010   - Konrad Dybcio <konrad.dybcio@somainline.org>
0011 
0012 description: |
0013   Qualcomm global clock control module which supports the clocks, resets and
0014   power domains on SM6125.
0015 
0016   See also:
0017   - dt-bindings/clock/qcom,gcc-sm6125.h
0018 
0019 properties:
0020   compatible:
0021     const: qcom,gcc-sm6125
0022 
0023   clocks:
0024     items:
0025       - description: Board XO source
0026       - description: Sleep clock source
0027 
0028   clock-names:
0029     items:
0030       - const: bi_tcxo
0031       - const: sleep_clk
0032 
0033   '#clock-cells':
0034     const: 1
0035 
0036   '#reset-cells':
0037     const: 1
0038 
0039   '#power-domain-cells':
0040     const: 1
0041 
0042   reg:
0043     maxItems: 1
0044 
0045   protected-clocks:
0046     description:
0047       Protected clock specifier list as per common clock binding.
0048 
0049 required:
0050   - compatible
0051   - clocks
0052   - clock-names
0053   - reg
0054   - '#clock-cells'
0055   - '#reset-cells'
0056   - '#power-domain-cells'
0057 
0058 additionalProperties: false
0059 
0060 examples:
0061   - |
0062     #include <dt-bindings/clock/qcom,rpmcc.h>
0063     clock-controller@1400000 {
0064         compatible = "qcom,gcc-sm6125";
0065         reg = <0x01400000 0x1f0000>;
0066         #clock-cells = <1>;
0067         #reset-cells = <1>;
0068         #power-domain-cells = <1>;
0069         clock-names = "bi_tcxo", "sleep_clk";
0070         clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&sleep_clk>;
0071     };
0072 ...