0001 # SPDX-License-Identifier: GPL-2.0-only
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm Global Clock & Reset Controller Binding for MSM8998
0008
0009 maintainers:
0010 - Stephen Boyd <sboyd@kernel.org>
0011 - Taniya Das <tdas@codeaurora.org>
0012
0013 description: |
0014 Qualcomm global clock control module which supports the clocks, resets and
0015 power domains on MSM8998.
0016
0017 See also:
0018 - dt-bindings/clock/qcom,gcc-msm8998.h
0019
0020 properties:
0021 compatible:
0022 const: qcom,gcc-msm8998
0023
0024 clocks:
0025 items:
0026 - description: Board XO source
0027 - description: Sleep clock source
0028 - description: Audio reference clock (Optional clock)
0029 - description: PLL test clock source (Optional clock)
0030 minItems: 2
0031
0032 clock-names:
0033 items:
0034 - const: xo
0035 - const: sleep_clk
0036 - const: aud_ref_clk # Optional clock
0037 - const: core_bi_pll_test_se # Optional clock
0038 minItems: 2
0039
0040 '#clock-cells':
0041 const: 1
0042
0043 '#reset-cells':
0044 const: 1
0045
0046 '#power-domain-cells':
0047 const: 1
0048
0049 reg:
0050 maxItems: 1
0051
0052 protected-clocks:
0053 description:
0054 Protected clock specifier list as per common clock binding.
0055
0056 required:
0057 - compatible
0058 - clocks
0059 - clock-names
0060 - reg
0061 - '#clock-cells'
0062 - '#reset-cells'
0063 - '#power-domain-cells'
0064
0065 additionalProperties: false
0066
0067 examples:
0068 - |
0069 #include <dt-bindings/clock/qcom,rpmcc.h>
0070 clock-controller@100000 {
0071 compatible = "qcom,gcc-msm8998";
0072 #clock-cells = <1>;
0073 #reset-cells = <1>;
0074 #power-domain-cells = <1>;
0075 reg = <0x00100000 0xb0000>;
0076 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
0077 <&sleep>,
0078 <0>,
0079 <0>;
0080 clock-names = "xo",
0081 "sleep_clk",
0082 "aud_ref_clk",
0083 "core_bi_pll_test_se";
0084 };
0085 ...
