0001 # SPDX-License-Identifier: GPL-2.0-only
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm Global Clock & Reset Controller Binding for MSM8996
0008
0009 maintainers:
0010 - Stephen Boyd <sboyd@kernel.org>
0011 - Taniya Das <tdas@codeaurora.org>
0012
0013 description: |
0014 Qualcomm global clock control module which supports the clocks, resets and
0015 power domains on MSM8996.
0016
0017 See also:
0018 - dt-bindings/clock/qcom,gcc-msm8996.h
0019
0020 properties:
0021 compatible:
0022 const: qcom,gcc-msm8996
0023
0024 clocks:
0025 minItems: 3
0026 items:
0027 - description: XO source
0028 - description: Second XO source
0029 - description: Sleep clock source
0030 - description: PCIe 0 PIPE clock (optional)
0031 - description: PCIe 1 PIPE clock (optional)
0032 - description: PCIe 2 PIPE clock (optional)
0033 - description: USB3 PIPE clock (optional)
0034 - description: UFS RX symbol 0 clock (optional)
0035 - description: UFS RX symbol 1 clock (optional)
0036 - description: UFS TX symbol 0 clock (optional)
0037
0038 clock-names:
0039 minItems: 3
0040 items:
0041 - const: cxo
0042 - const: cxo2
0043 - const: sleep_clk
0044 - const: pcie_0_pipe_clk_src
0045 - const: pcie_1_pipe_clk_src
0046 - const: pcie_2_pipe_clk_src
0047 - const: usb3_phy_pipe_clk_src
0048 - const: ufs_rx_symbol_0_clk_src
0049 - const: ufs_rx_symbol_1_clk_src
0050 - const: ufs_tx_symbol_0_clk_src
0051
0052 '#clock-cells':
0053 const: 1
0054
0055 '#reset-cells':
0056 const: 1
0057
0058 '#power-domain-cells':
0059 const: 1
0060
0061 reg:
0062 maxItems: 1
0063
0064 protected-clocks:
0065 description:
0066 Protected clock specifier list as per common clock binding.
0067
0068 required:
0069 - compatible
0070 - reg
0071 - '#clock-cells'
0072 - '#reset-cells'
0073 - '#power-domain-cells'
0074
0075 additionalProperties: false
0076
0077 examples:
0078 - |
0079 clock-controller@300000 {
0080 compatible = "qcom,gcc-msm8996";
0081 #clock-cells = <1>;
0082 #reset-cells = <1>;
0083 #power-domain-cells = <1>;
0084 reg = <0x300000 0x90000>;
0085 };
0086 ...
