0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064
0008
0009 allOf:
0010 - $ref: qcom,gcc.yaml#
0011
0012 maintainers:
0013 - Ansuel Smith <ansuelsmth@gmail.com>
0014
0015 description: |
0016 Qualcomm global clock control module which supports the clocks, resets and
0017 power domains on IPQ8064.
0018
0019 See also:
0020 - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
0021 - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
0022
0023 properties:
0024 compatible:
0025 items:
0026 - const: qcom,gcc-ipq8064
0027 - const: syscon
0028
0029 clocks:
0030 items:
0031 - description: PXO source
0032 - description: CXO source
0033
0034 clock-names:
0035 items:
0036 - const: pxo
0037 - const: cxo
0038
0039 thermal-sensor:
0040 type: object
0041
0042 allOf:
0043 - $ref: /schemas/thermal/qcom-tsens.yaml#
0044
0045 required:
0046 - compatible
0047 - clocks
0048 - clock-names
0049
0050 unevaluatedProperties: false
0051
0052 examples:
0053 - |
0054 #include <dt-bindings/interrupt-controller/arm-gic.h>
0055
0056 gcc: clock-controller@900000 {
0057 compatible = "qcom,gcc-ipq8064", "syscon";
0058 reg = <0x00900000 0x4000>;
0059 clocks = <&pxo_board>, <&cxo_board>;
0060 clock-names = "pxo", "cxo";
0061 #clock-cells = <1>;
0062 #reset-cells = <1>;
0063 #power-domain-cells = <1>;
0064
0065 tsens: thermal-sensor {
0066 compatible = "qcom,ipq8064-tsens";
0067
0068 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
0069 nvmem-cell-names = "calib", "calib_backup";
0070 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
0071 interrupt-names = "uplow";
0072
0073 #qcom,sensors = <11>;
0074 #thermal-sensor-cells = <1>;
0075 };
0076 };
