0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs
0008
0009 maintainers:
0010 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
0011
0012 description: |
0013 The clock consumer should specify the desired clock by having the clock
0014 ID in its "clocks" phandle cell.
0015 See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
0016 of Audio Clock controller clock IDs.
0017
0018 properties:
0019 compatible:
0020 const: qcom,sm8250-lpass-audiocc
0021
0022 reg:
0023 maxItems: 1
0024
0025 '#clock-cells':
0026 const: 1
0027
0028 clocks:
0029 items:
0030 - description: LPASS Core voting clock
0031 - description: Glitch Free Mux register clock
0032
0033 clock-names:
0034 items:
0035 - const: core
0036 - const: bus
0037
0038 required:
0039 - compatible
0040 - reg
0041 - '#clock-cells'
0042 - clocks
0043 - clock-names
0044
0045 additionalProperties: false
0046
0047 examples:
0048 - |
0049 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
0050 #include <dt-bindings/sound/qcom,q6afe.h>
0051 clock-controller@3300000 {
0052 #clock-cells = <1>;
0053 compatible = "qcom,sm8250-lpass-audiocc";
0054 reg = <0x03300000 0x30000>;
0055 clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
0056 <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
0057 clock-names = "core", "bus";
0058 };
