Back to home page

OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Qualcomm A53 PLL Binding
0008 
0009 maintainers:
0010   - Sivaprakash Murugesan <sivaprak@codeaurora.org>
0011 
0012 description:
0013   The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
0014   frequencies above 1GHz.
0015 
0016 properties:
0017   compatible:
0018     enum:
0019       - qcom,ipq6018-a53pll
0020       - qcom,msm8916-a53pll
0021       - qcom,msm8939-a53pll
0022 
0023   reg:
0024     maxItems: 1
0025 
0026   '#clock-cells':
0027     const: 0
0028 
0029   clocks:
0030     items:
0031       - description: board XO clock
0032 
0033   clock-names:
0034     items:
0035       - const: xo
0036 
0037   operating-points-v2: true
0038 
0039 required:
0040   - compatible
0041   - reg
0042   - '#clock-cells'
0043 
0044 additionalProperties: false
0045 
0046 examples:
0047   #Example 1 - A53 PLL found on MSM8916 devices
0048   - |
0049     a53pll: clock@b016000 {
0050         compatible = "qcom,msm8916-a53pll";
0051         reg = <0xb016000 0x40>;
0052         #clock-cells = <0>;
0053     };
0054   #Example 2 - A53 PLL found on IPQ6018 devices
0055   - |
0056     a53pll_ipq: clock-controller@b116000 {
0057         compatible = "qcom,ipq6018-a53pll";
0058         reg = <0x0b116000 0x40>;
0059         #clock-cells = <0>;
0060         clocks = <&xo>;
0061         clock-names = "xo";
0062     };