0001 Device Tree Clock bindings for cpu clock of Marvell EBU platforms
0002
0003 Required properties:
0004 - compatible : shall be one of the following:
0005 "marvell,armada-xp-cpu-clock" - cpu clocks for Armada XP
0006 "marvell,mv98dx3236-cpu-clock" - cpu clocks for 98DX3236 SoC
0007 - reg : Address and length of the clock complex register set, followed
0008 by address and length of the PMU DFS registers
0009 - #clock-cells : should be set to 1.
0010 - clocks : shall be the input parent clock phandle for the clock.
0011
0012 cpuclk: clock-complex@d0018700 {
0013 #clock-cells = <1>;
0014 compatible = "marvell,armada-xp-cpu-clock";
0015 reg = <0xd0018700 0xA0>, <0x1c054 0x10>;
0016 clocks = <&coreclk 1>;
0017 }
0018
0019 cpu@0 {
0020 compatible = "marvell,sheeva-v7";
0021 reg = <0>;
0022 clocks = <&cpuclk 0>;
0023 };