bindings/clock/mvebu-corediv-clock.txt

0001 * Core Divider Clock bindings for Marvell MVEBU SoCs
0002
0003 The following is a list of provided IDs and clock names on Armada 370/XP:
0004  0 = nand (NAND clock)
0005
0006 Required properties:
0007 - compatible : must be "marvell,armada-370-corediv-clock",
0008                        "marvell,armada-375-corediv-clock",
0009                        "marvell,armada-380-corediv-clock",
0010                        "marvell,mv98dx3236-corediv-clock",
0011
0012 - reg : must be the register address of Core Divider control register
0013 - #clock-cells : from common clock binding; shall be set to 1
0014 - clocks : must be set to the parent's phandle
0015
0016 Example:
0017
0018 corediv_clk: corediv-clocks@18740 {
0019         compatible = "marvell,armada-370-corediv-clock";
0020         reg = <0x18740 0xc>;
0021         #clock-cells = <1>;
0022         clocks = <&pll>;
0023 };