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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: MStar/Sigmastar MSC313 MPLL
0008 
0009 maintainers:
0010   - Daniel Palmer <daniel@thingy.jp>
0011 
0012 description: |
0013   The MStar/SigmaStar MSC313 and later ARMv7 chips have an MPLL block that
0014   takes the external xtal input and multiplies it to create a high
0015   frequency clock and divides that down into a number of clocks that
0016   peripherals use.
0017 
0018 properties:
0019   compatible:
0020     const: mstar,msc313-mpll
0021 
0022   "#clock-cells":
0023     const: 1
0024 
0025   clocks:
0026     maxItems: 1
0027 
0028   reg:
0029     maxItems: 1
0030 
0031 required:
0032   - compatible
0033   - "#clock-cells"
0034   - clocks
0035   - reg
0036 
0037 additionalProperties: false
0038 
0039 examples:
0040   - |
0041     mpll@206000 {
0042         compatible = "mstar,msc313-mpll";
0043         reg = <0x206000 0x200>;
0044         #clock-cells = <1>;
0045         clocks = <&xtal>;
0046     };