bindings/clock/marvell%2Cmmp2-clock.yaml

0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Marvell MMP2 and MMP3 Clock Controller
0008
0009 maintainers:
0010   - Lubomir Rintel <lkundrak@v3.sk>
0011
0012 description: |
0013   The clock subsystem on MMP2 or MMP3 generates and supplies clock to various
0014   controllers within the SoC.
0015
0016   Each clock is assigned an identifier and client nodes use this identifier
0017   to specify the clock which they consume.
0018
0019   All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>.
0020
0021 properties:
0022   compatible:
0023     enum:
0024       - marvell,mmp2-clock # controller compatible with MMP2 SoC
0025       - marvell,mmp3-clock # controller compatible with MMP3 SoC
0026
0027   reg:
0028     items:
0029       - description: MPMU register region
0030       - description: APMU register region
0031       - description: APBC register region
0032
0033   reg-names:
0034     items:
0035       - const: mpmu
0036       - const: apmu
0037       - const: apbc
0038
0039   '#clock-cells':
0040     const: 1
0041
0042   '#reset-cells':
0043     const: 1
0044
0045   '#power-domain-cells':
0046     const: 1
0047
0048 required:
0049   - compatible
0050   - reg
0051   - reg-names
0052   - '#clock-cells'
0053   - '#reset-cells'
0054   - '#power-domain-cells'
0055
0056 additionalProperties: false
0057
0058 examples:
0059   - |
0060     clock-controller@d4050000 {
0061       compatible = "marvell,mmp2-clock";
0062       reg = <0xd4050000 0x1000>,
0063             <0xd4282800 0x400>,
0064             <0xd4015000 0x1000>;
0065       reg-names = "mpmu", "apmu", "apbc";
0066       #clock-cells = <1>;
0067       #reset-cells = <1>;
0068       #power-domain-cells = <1>;
0069     };