0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 title: Marvell Armada 3720 UART clocks
0007
0008 maintainers:
0009 - Pali Rohár <pali@kernel.org>
0010
0011 properties:
0012 compatible:
0013 const: marvell,armada-3700-uart-clock
0014
0015 reg:
0016 items:
0017 - description: UART Clock Control Register
0018 - description: UART 2 Baud Rate Divisor Register
0019
0020 clocks:
0021 description: |
0022 List of parent clocks suitable for UART from following set:
0023 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
0024 UART clock can use one from this set and when more are provided
0025 then kernel would choose and configure the most suitable one.
0026 It is suggest to specify at least one TBG clock to achieve
0027 baudrates above 230400 and also to specify clock which bootloader
0028 used for UART (most probably xtal) for smooth boot log on UART.
0029
0030 clock-names:
0031 items:
0032 - const: TBG-A-P
0033 - const: TBG-B-P
0034 - const: TBG-A-S
0035 - const: TBG-B-S
0036 - const: xtal
0037 minItems: 1
0038
0039 '#clock-cells':
0040 const: 1
0041
0042 required:
0043 - compatible
0044 - reg
0045 - clocks
0046 - clock-names
0047 - '#clock-cells'
0048
0049 additionalProperties: false
0050
0051 examples:
0052 - |
0053 uartclk: clock-controller@12010 {
0054 compatible = "marvell,armada-3700-uart-clock";
0055 reg = <0x12010 0x4>, <0x12210 0x4>;
0056 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>;
0057 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
0058 #clock-cells = <1>;
0059 };
