bindings/clock/imx8ulp-cgc-clock.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/imx8ulp-cgc-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NXP i.MX8ULP Clock Generation & Control(CGC) Module Binding
0008
0009 maintainers:
0010   - Jacky Bai <ping.bai@nxp.com>
0011
0012 description: |
0013   On i.MX8ULP, The clock sources generation, distribution and management is
0014   under the control of several CGCs & PCCs modules. The CGC modules generate
0015   and distribute clocks on the device.
0016
0017 properties:
0018   compatible:
0019     enum:
0020       - fsl,imx8ulp-cgc1
0021       - fsl,imx8ulp-cgc2
0022
0023   reg:
0024     maxItems: 1
0025
0026   '#clock-cells':
0027     const: 1
0028
0029 required:
0030   - compatible
0031   - reg
0032   - '#clock-cells'
0033
0034 additionalProperties: false
0035
0036 examples:
0037   # Clock Generation & Control Module node:
0038   - |
0039     clock-controller@292c0000 {
0040         compatible = "fsl,imx8ulp-cgc1";
0041         reg = <0x292c0000 0x10000>;
0042         #clock-cells = <1>;
0043     };