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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/imx25-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Clock bindings for Freescale i.MX25
0008
0009 maintainers:
0010 - Sascha Hauer <s.hauer@pengutronix.de>
0011
0012 description: |
0013 The clock consumer should specify the desired clock by having the clock
0014 ID in its "clocks" phandle cell. The following is a full list of i.MX25
0015 clocks and IDs.
0016
0017 Clock ID
0018 --------------------------
0019 dummy 0
0020 osc 1
0021 mpll 2
0022 upll 3
0023 mpll_cpu_3_4 4
0024 cpu_sel 5
0025 cpu 6
0026 ahb 7
0027 usb_div 8
0028 ipg 9
0029 per0_sel 10
0030 per1_sel 11
0031 per2_sel 12
0032 per3_sel 13
0033 per4_sel 14
0034 per5_sel 15
0035 per6_sel 16
0036 per7_sel 17
0037 per8_sel 18
0038 per9_sel 19
0039 per10_sel 20
0040 per11_sel 21
0041 per12_sel 22
0042 per13_sel 23
0043 per14_sel 24
0044 per15_sel 25
0045 per0 26
0046 per1 27
0047 per2 28
0048 per3 29
0049 per4 30
0050 per5 31
0051 per6 32
0052 per7 33
0053 per8 34
0054 per9 35
0055 per10 36
0056 per11 37
0057 per12 38
0058 per13 39
0059 per14 40
0060 per15 41
0061 csi_ipg_per 42
0062 epit_ipg_per 43
0063 esai_ipg_per 44
0064 esdhc1_ipg_per 45
0065 esdhc2_ipg_per 46
0066 gpt_ipg_per 47
0067 i2c_ipg_per 48
0068 lcdc_ipg_per 49
0069 nfc_ipg_per 50
0070 owire_ipg_per 51
0071 pwm_ipg_per 52
0072 sim1_ipg_per 53
0073 sim2_ipg_per 54
0074 ssi1_ipg_per 55
0075 ssi2_ipg_per 56
0076 uart_ipg_per 57
0077 ata_ahb 58
0078 reserved 59
0079 csi_ahb 60
0080 emi_ahb 61
0081 esai_ahb 62
0082 esdhc1_ahb 63
0083 esdhc2_ahb 64
0084 fec_ahb 65
0085 lcdc_ahb 66
0086 rtic_ahb 67
0087 sdma_ahb 68
0088 slcdc_ahb 69
0089 usbotg_ahb 70
0090 reserved 71
0091 reserved 72
0092 reserved 73
0093 reserved 74
0094 can1_ipg 75
0095 can2_ipg 76
0096 csi_ipg 77
0097 cspi1_ipg 78
0098 cspi2_ipg 79
0099 cspi3_ipg 80
0100 dryice_ipg 81
0101 ect_ipg 82
0102 epit1_ipg 83
0103 epit2_ipg 84
0104 reserved 85
0105 esdhc1_ipg 86
0106 esdhc2_ipg 87
0107 fec_ipg 88
0108 reserved 89
0109 reserved 90
0110 reserved 91
0111 gpt1_ipg 92
0112 gpt2_ipg 93
0113 gpt3_ipg 94
0114 gpt4_ipg 95
0115 reserved 96
0116 reserved 97
0117 reserved 98
0118 iim_ipg 99
0119 reserved 100
0120 reserved 101
0121 kpp_ipg 102
0122 lcdc_ipg 103
0123 reserved 104
0124 pwm1_ipg 105
0125 pwm2_ipg 106
0126 pwm3_ipg 107
0127 pwm4_ipg 108
0128 rngb_ipg 109
0129 reserved 110
0130 scc_ipg 111
0131 sdma_ipg 112
0132 sim1_ipg 113
0133 sim2_ipg 114
0134 slcdc_ipg 115
0135 spba_ipg 116
0136 ssi1_ipg 117
0137 ssi2_ipg 118
0138 tsc_ipg 119
0139 uart1_ipg 120
0140 uart2_ipg 121
0141 uart3_ipg 122
0142 uart4_ipg 123
0143 uart5_ipg 124
0144 reserved 125
0145 wdt_ipg 126
0146 cko_div 127
0147 cko_sel 128
0148 cko 129
0149
0150 properties:
0151 compatible:
0152 const: fsl,imx25-ccm
0153
0154 reg:
0155 maxItems: 1
0156
0157 interrupts:
0158 maxItems: 1
0159
0160 '#clock-cells':
0161 const: 1
0162
0163 required:
0164 - compatible
0165 - reg
0166 - interrupts
0167 - '#clock-cells'
0168
0169 additionalProperties: false
0170
0171 examples:
0172 - |
0173 clock-controller@53f80000 {
0174 compatible = "fsl,imx25-ccm";
0175 reg = <0x53f80000 0x4000>;
0176 interrupts = <31>;
0177 #clock-cells = <1>;
0178 };
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