0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators
0008
0009 description: |
0010 The IDT VersaClock 5 and VersaClock 6 are programmable I2C
0011 clock generators providing from 3 to 12 output clocks.
0012
0013 When referencing the provided clock in the DT using phandle and clock
0014 specifier, the following mapping applies:
0015
0016 - 5P49V5923:
0017 0 -- OUT0_SEL_I2CB
0018 1 -- OUT1
0019 2 -- OUT2
0020
0021 - 5P49V5933:
0022 0 -- OUT0_SEL_I2CB
0023 1 -- OUT1
0024 2 -- OUT4
0025
0026 - other parts:
0027 0 -- OUT0_SEL_I2CB
0028 1 -- OUT1
0029 2 -- OUT2
0030 3 -- OUT3
0031 4 -- OUT4
0032
0033 The idt,shutdown and idt,output-enable-active properties control the
0034 SH (en_global_shutdown) and SP bits of the Primary Source and Shutdown
0035 Register, respectively. Their behavior is summarized by the following
0036 table:
0037
0038 SH SP Output when the SD/OE pin is Low/High
0039 == == =====================================
0040 0 0 Active/Inactive
0041 0 1 Inactive/Active
0042 1 0 Active/Shutdown
0043 1 1 Inactive/Shutdown
0044
0045 The case where SH and SP are both 1 is likely not very interesting.
0046
0047 maintainers:
0048 - Luca Ceresoli <luca.ceresoli@bootlin.com>
0049
0050 properties:
0051 compatible:
0052 enum:
0053 - idt,5p49v5923
0054 - idt,5p49v5925
0055 - idt,5p49v5933
0056 - idt,5p49v5935
0057 - idt,5p49v6901
0058 - idt,5p49v6965
0059
0060 reg:
0061 description: I2C device address
0062 enum: [ 0x68, 0x6a ]
0063
0064 '#clock-cells':
0065 const: 1
0066
0067 clock-names:
0068 minItems: 1
0069 maxItems: 2
0070 items:
0071 enum: [ xin, clkin ]
0072 clocks:
0073 minItems: 1
0074 maxItems: 2
0075
0076 idt,xtal-load-femtofarads:
0077 minimum: 9000
0078 maximum: 22760
0079 description: Optional load capacitor for XTAL1 and XTAL2
0080
0081 idt,shutdown:
0082 $ref: /schemas/types.yaml#/definitions/uint32
0083 enum: [0, 1]
0084 description: |
0085 If 1, this enables the shutdown functionality: the chip will be
0086 shut down if the SD/OE pin is driven high. If 0, this disables the
0087 shutdown functionality: the chip will never be shut down based on
0088 the value of the SD/OE pin. This property corresponds to the SH
0089 bit of the Primary Source and Shutdown Register.
0090
0091 idt,output-enable-active:
0092 $ref: /schemas/types.yaml#/definitions/uint32
0093 enum: [0, 1]
0094 description: |
0095 If 1, this enables output when the SD/OE pin is high, and disables
0096 output when the SD/OE pin is low. If 0, this disables output when
0097 the SD/OE pin is high, and enables output when the SD/OE pin is
0098 low. This corresponds to the SP bit of the Primary Source and
0099 Shutdown Register.
0100
0101 patternProperties:
0102 "^OUT[1-4]$":
0103 type: object
0104 description:
0105 Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
0106 Configuration" in the Versaclock 5/6/6E Family Register Description
0107 and Programming Guide.
0108 properties:
0109 idt,mode:
0110 description:
0111 The output drive mode. Values defined in dt-bindings/clk/versaclock.h
0112 $ref: /schemas/types.yaml#/definitions/uint32
0113 minimum: 0
0114 maximum: 6
0115 idt,voltage-microvolt:
0116 description: The output drive voltage.
0117 enum: [ 1800000, 2500000, 3300000 ]
0118 idt,slew-percent:
0119 description: The Slew rate control for CMOS single-ended.
0120 enum: [ 80, 85, 90, 100 ]
0121 additionalProperties: false
0122
0123 required:
0124 - compatible
0125 - reg
0126 - '#clock-cells'
0127 - idt,shutdown
0128 - idt,output-enable-active
0129
0130 allOf:
0131 - if:
0132 properties:
0133 compatible:
0134 enum:
0135 - idt,5p49v5933
0136 - idt,5p49v5935
0137 then:
0138 # Devices with builtin crystal + optional external input
0139 properties:
0140 clock-names:
0141 const: clkin
0142 clocks:
0143 maxItems: 1
0144 else:
0145 # Devices without builtin crystal
0146 required:
0147 - clock-names
0148 - clocks
0149
0150 additionalProperties: false
0151
0152 examples:
0153 - |
0154 #include <dt-bindings/clk/versaclock.h>
0155
0156 /* 25MHz reference crystal */
0157 ref25: ref25m {
0158 compatible = "fixed-clock";
0159 #clock-cells = <0>;
0160 clock-frequency = <25000000>;
0161 };
0162
0163 i2c@0 {
0164 reg = <0x0 0x100>;
0165 #address-cells = <1>;
0166 #size-cells = <0>;
0167
0168 /* IDT 5P49V5923 I2C clock generator */
0169 vc5: clock-generator@6a {
0170 compatible = "idt,5p49v5923";
0171 reg = <0x6a>;
0172 #clock-cells = <1>;
0173
0174 /* Connect XIN input to 25MHz reference */
0175 clocks = <&ref25m>;
0176 clock-names = "xin";
0177
0178 /* Set the SD/OE pin's settings */
0179 idt,shutdown = <0>;
0180 idt,output-enable-active = <0>;
0181
0182 OUT1 {
0183 idt,mode = <VC5_CMOSD>;
0184 idt,voltage-microvolt = <1800000>;
0185 idt,slew-percent = <80>;
0186 };
0187
0188 OUT4 {
0189 idt,mode = <VC5_LVDS>;
0190 };
0191 };
0192 };
0193
0194 ...
