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OSCL-LXR

 
 

    


0001 * Hisilicon Hix5hd2 Clock Controller
0002 
0003 The hix5hd2 clock controller generates and supplies clock to various
0004 controllers within the hix5hd2 SoC.
0005 
0006 Required Properties:
0007 
0008 - compatible: should be "hisilicon,hix5hd2-clock"
0009 - reg: Address and length of the register set
0010 - #clock-cells: Should be <1>
0011 
0012 Each clock is assigned an identifier and client nodes use this identifier
0013 to specify the clock which they consume.
0014 
0015 All these identifier could be found in <dt-bindings/clock/hix5hd2-clock.h>.
0016 
0017 Examples:
0018         clock: clock@f8a22000 {
0019                 compatible = "hisilicon,hix5hd2-clock";
0020                 reg = <0xf8a22000 0x1000>;
0021                 #clock-cells = <1>;
0022         };
0023 
0024         uart0: uart@f8b00000 {
0025                 compatible = "arm,pl011", "arm,primecell";
0026                 reg = <0xf8b00000 0x1000>;
0027                 interrupts = <0 49 4>;
0028                 clocks = <&clock HIX5HD2_FIXED_83M>;
0029                 clock-names = "apb_pclk";
0030         };