0001 * HiSilicon Clock and Reset Generator(CRG)
0002
0003 The CRG module provides clock and reset signals to various
0004 modules within the SoC.
0005
0006 This binding uses the following bindings:
0007 Documentation/devicetree/bindings/clock/clock-bindings.txt
0008 Documentation/devicetree/bindings/reset/reset.txt
0009
0010 Required Properties:
0011
0012 - compatible: should be one of the following.
0013 - "hisilicon,hi3516cv300-crg"
0014 - "hisilicon,hi3516cv300-sysctrl"
0015 - "hisilicon,hi3519-crg"
0016 - "hisilicon,hi3798cv200-crg"
0017 - "hisilicon,hi3798cv200-sysctrl"
0018
0019 - reg: physical base address of the controller and length of memory mapped
0020 region.
0021
0022 - #clock-cells: should be 1.
0023
0024 Each clock is assigned an identifier and client nodes use this identifier
0025 to specify the clock which they consume.
0026
0027 All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>.
0028
0029 - #reset-cells: should be 2.
0030
0031 A reset signal can be controlled by writing a bit register in the CRG module.
0032 The reset specifier consists of two cells. The first cell represents the
0033 register offset relative to the base address. The second cell represents the
0034 bit index in the register.
0035
0036 Example: CRG nodes
0037 CRG: clock-reset-controller@12010000 {
0038 compatible = "hisilicon,hi3519-crg";
0039 reg = <0x12010000 0x10000>;
0040 #clock-cells = <1>;
0041 #reset-cells = <2>;
0042 };
0043
0044 Example: consumer nodes
0045 i2c0: i2c@12110000 {
0046 compatible = "hisilicon,hi3519-i2c";
0047 reg = <0x12110000 0x1000>;
0048 clocks = <&CRG HI3519_I2C0_RST>;
0049 resets = <&CRG 0xe4 0>;
0050 };
