0001 * Hisilicon Hi3670 Clock Controller
0002
0003 The Hi3670 clock controller generates and supplies clock to various
0004 controllers within the Hi3670 SoC.
0005
0006 Required Properties:
0007
0008 - compatible: the compatible should be one of the following strings to
0009 indicate the clock controller functionality.
0010
0011 - "hisilicon,hi3670-crgctrl"
0012 - "hisilicon,hi3670-pctrl"
0013 - "hisilicon,hi3670-pmuctrl"
0014 - "hisilicon,hi3670-sctrl"
0015 - "hisilicon,hi3670-iomcu"
0016 - "hisilicon,hi3670-media1-crg"
0017 - "hisilicon,hi3670-media2-crg"
0018
0019 - reg: physical base address of the controller and length of memory mapped
0020 region.
0021
0022 - #clock-cells: should be 1.
0023
0024 Each clock is assigned an identifier and client nodes use this identifier
0025 to specify the clock which they consume.
0026
0027 All these identifier could be found in <dt-bindings/clock/hi3670-clock.h>.
0028
0029 Examples:
0030 crg_ctrl: clock-controller@fff35000 {
0031 compatible = "hisilicon,hi3670-crgctrl", "syscon";
0032 reg = <0x0 0xfff35000 0x0 0x1000>;
0033 #clock-cells = <1>;
0034 };
0035
0036 uart0: serial@fdf02000 {
0037 compatible = "arm,pl011", "arm,primecell";
0038 reg = <0x0 0xfdf02000 0x0 0x1000>;
0039 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
0040 clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
0041 <&crg_ctrl HI3670_PCLK>;
0042 clock-names = "uartclk", "apb_pclk";
0043 };
