0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/clock/fixed-mmio-clock.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Binding for simple memory mapped IO fixed-rate clock sources
0008
0009 description:
0010 This binding describes a fixed-rate clock for which the frequency can
0011 be read from a single 32-bit memory mapped I/O register.
0012
0013 It was designed for test systems, like FPGA, not for complete,
0014 finished SoCs.
0015
0016 maintainers:
0017 - Jan Kotas <jank@cadence.com>
0018
0019 properties:
0020 compatible:
0021 const: fixed-mmio-clock
0022
0023 reg:
0024 maxItems: 1
0025
0026 "#clock-cells":
0027 const: 0
0028
0029 clock-output-names:
0030 maxItems: 1
0031
0032 required:
0033 - compatible
0034 - reg
0035 - "#clock-cells"
0036
0037 additionalProperties: false
0038
0039 examples:
0040 - |
0041 sysclock: sysclock@fd020004 {
0042 compatible = "fixed-mmio-clock";
0043 #clock-cells = <0>;
0044 reg = <0xfd020004 0x4>;
0045 clock-output-names = "sysclk";
0046 };
0047 ...
