0001 * Amlogic GXBB Clock and Reset Unit
0002
0003 The Amlogic GXBB clock controller generates and supplies clock to various
0004 controllers within the SoC.
0005
0006 Required Properties:
0007
0008 - compatible: should be:
0009 "amlogic,gxbb-clkc" for GXBB SoC,
0010 "amlogic,gxl-clkc" for GXL and GXM SoC,
0011 "amlogic,axg-clkc" for AXG SoC.
0012 "amlogic,g12a-clkc" for G12A SoC.
0013 "amlogic,g12b-clkc" for G12B SoC.
0014 "amlogic,sm1-clkc" for SM1 SoC.
0015 - clocks : list of clock phandle, one for each entry clock-names.
0016 - clock-names : should contain the following:
0017 * "xtal": the platform xtal
0018
0019 - #clock-cells: should be 1.
0020
0021 Each clock is assigned an identifier and client nodes can use this identifier
0022 to specify the clock which they consume. All available clocks are defined as
0023 preprocessor macros in the dt-bindings/clock/gxbb-clkc.h header and can be
0024 used in device tree sources.
0025
0026 Parent node should have the following properties :
0027 - compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or
0028 "amlogic,meson-axg-hhi-sysctrl"
0029 - reg: base address and size of the HHI system control register space.
0030
0031 Example: Clock controller node:
0032
0033 sysctrl: system-controller@0 {
0034 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
0035 reg = <0 0 0 0x400>;
0036
0037 clkc: clock-controller {
0038 #clock-cells = <1>;
0039 compatible = "amlogic,gxbb-clkc";
0040 clocks = <&xtal>;
0041 clock-names = "xtal";
0042 };
0043 };
0044
0045 Example: UART controller node that consumes the clock generated by the clock
0046 controller:
0047
0048 uart_AO: serial@c81004c0 {
0049 compatible = "amlogic,meson-uart";
0050 reg = <0xc81004c0 0x14>;
0051 interrupts = <0 90 1>;
0052 clocks = <&clkc CLKID_CLK81>;
0053 };
