0001 * Amlogic GXBB AO Clock and Reset Unit
0002
0003 The Amlogic GXBB AO clock controller generates and supplies clock to various
0004 controllers within the Always-On part of the SoC.
0005
0006 Required Properties:
0007
0008 - compatible: value should be different for each SoC family as :
0009 - GXBB (S905) : "amlogic,meson-gxbb-aoclkc"
0010 - GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc"
0011 - GXM (S912) : "amlogic,meson-gxm-aoclkc"
0012 - AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"
0013 - G12A (S905X2, S905D2, S905Y2) : "amlogic,meson-g12a-aoclkc"
0014 followed by the common "amlogic,meson-gx-aoclkc"
0015 - clocks: list of clock phandle, one for each entry clock-names.
0016 - clock-names: should contain the following:
0017 * "xtal" : the platform xtal
0018 * "mpeg-clk" : the main clock controller mother clock (aka clk81)
0019 * "ext-32k-0" : external 32kHz reference #0 if any (optional)
0020 * "ext-32k-1" : external 32kHz reference #1 if any (optional - gx only)
0021 * "ext-32k-2" : external 32kHz reference #2 if any (optional - gx only)
0022
0023 - #clock-cells: should be 1.
0024
0025 Each clock is assigned an identifier and client nodes can use this identifier
0026 to specify the clock which they consume. All available clocks are defined as
0027 preprocessor macros in the dt-bindings/clock/gxbb-aoclkc.h header and can be
0028 used in device tree sources.
0029
0030 - #reset-cells: should be 1.
0031
0032 Each reset is assigned an identifier and client nodes can use this identifier
0033 to specify the reset which they consume. All available resets are defined as
0034 preprocessor macros in the dt-bindings/reset/gxbb-aoclkc.h header and can be
0035 used in device tree sources.
0036
0037 Parent node should have the following properties :
0038 - compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"
0039 - reg: base address and size of the AO system control register space.
0040
0041 Example: AO Clock controller node:
0042
0043 ao_sysctrl: sys-ctrl@0 {
0044 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
0045 reg = <0x0 0x0 0x0 0x100>;
0046
0047 clkc_AO: clock-controller {
0048 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
0049 #clock-cells = <1>;
0050 #reset-cells = <1>;
0051 clocks = <&xtal>, <&clkc CLKID_CLK81>;
0052 clock-names = "xtal", "mpeg-clk";
0053 };
0054
0055 Example: UART controller node that consumes the clock and reset generated
0056 by the clock controller:
0057
0058 uart_AO: serial@4c0 {
0059 compatible = "amlogic,meson-uart";
0060 reg = <0x4c0 0x14>;
0061 interrupts = <0 90 1>;
0062 clocks = <&clkc_AO CLKID_AO_UART1>;
0063 resets = <&clkc_AO RESET_AO_UART1>;
0064 };
