0001 Alphascale Clock Controller
0002
0003 The ACC (Alphascale Clock Controller) is responsible of choising proper
0004 clock source, setting deviders and clock gates.
0005
0006 Required properties for the ACC node:
0007 - compatible: must be "alphascale,asm9260-clock-controller"
0008 - reg: must contain the ACC register base and size
0009 - #clock-cells : shall be set to 1.
0010
0011 Simple one-cell clock specifier format is used, where the only cell is used
0012 as an index of the clock inside the provider.
0013 It is encouraged to use dt-binding for clock index definitions. SoC specific
0014 dt-binding should be included to the device tree descriptor. For example
0015 Alphascale ASM9260:
0016 #include <dt-bindings/clock/alphascale,asm9260.h>
0017
0018 This binding contains two types of clock providers:
0019 _AHB_ - AHB gate;
0020 _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.
0021 All clock specific details can be found in the SoC documentation.
0022 CLKID_AHB_ROM 0
0023 CLKID_AHB_RAM 1
0024 CLKID_AHB_GPIO 2
0025 CLKID_AHB_MAC 3
0026 CLKID_AHB_EMI 4
0027 CLKID_AHB_USB0 5
0028 CLKID_AHB_USB1 6
0029 CLKID_AHB_DMA0 7
0030 CLKID_AHB_DMA1 8
0031 CLKID_AHB_UART0 9
0032 CLKID_AHB_UART1 10
0033 CLKID_AHB_UART2 11
0034 CLKID_AHB_UART3 12
0035 CLKID_AHB_UART4 13
0036 CLKID_AHB_UART5 14
0037 CLKID_AHB_UART6 15
0038 CLKID_AHB_UART7 16
0039 CLKID_AHB_UART8 17
0040 CLKID_AHB_UART9 18
0041 CLKID_AHB_I2S0 19
0042 CLKID_AHB_I2C0 20
0043 CLKID_AHB_I2C1 21
0044 CLKID_AHB_SSP0 22
0045 CLKID_AHB_IOCONFIG 23
0046 CLKID_AHB_WDT 24
0047 CLKID_AHB_CAN0 25
0048 CLKID_AHB_CAN1 26
0049 CLKID_AHB_MPWM 27
0050 CLKID_AHB_SPI0 28
0051 CLKID_AHB_SPI1 29
0052 CLKID_AHB_QEI 30
0053 CLKID_AHB_QUADSPI0 31
0054 CLKID_AHB_CAMIF 32
0055 CLKID_AHB_LCDIF 33
0056 CLKID_AHB_TIMER0 34
0057 CLKID_AHB_TIMER1 35
0058 CLKID_AHB_TIMER2 36
0059 CLKID_AHB_TIMER3 37
0060 CLKID_AHB_IRQ 38
0061 CLKID_AHB_RTC 39
0062 CLKID_AHB_NAND 40
0063 CLKID_AHB_ADC0 41
0064 CLKID_AHB_LED 42
0065 CLKID_AHB_DAC0 43
0066 CLKID_AHB_LCD 44
0067 CLKID_AHB_I2S1 45
0068 CLKID_AHB_MAC1 46
0069
0070 CLKID_SYS_CPU 47
0071 CLKID_SYS_AHB 48
0072 CLKID_SYS_I2S0M 49
0073 CLKID_SYS_I2S0S 50
0074 CLKID_SYS_I2S1M 51
0075 CLKID_SYS_I2S1S 52
0076 CLKID_SYS_UART0 53
0077 CLKID_SYS_UART1 54
0078 CLKID_SYS_UART2 55
0079 CLKID_SYS_UART3 56
0080 CLKID_SYS_UART4 56
0081 CLKID_SYS_UART5 57
0082 CLKID_SYS_UART6 58
0083 CLKID_SYS_UART7 59
0084 CLKID_SYS_UART8 60
0085 CLKID_SYS_UART9 61
0086 CLKID_SYS_SPI0 62
0087 CLKID_SYS_SPI1 63
0088 CLKID_SYS_QUADSPI 64
0089 CLKID_SYS_SSP0 65
0090 CLKID_SYS_NAND 66
0091 CLKID_SYS_TRACE 67
0092 CLKID_SYS_CAMM 68
0093 CLKID_SYS_WDT 69
0094 CLKID_SYS_CLKOUT 70
0095 CLKID_SYS_MAC 71
0096 CLKID_SYS_LCD 72
0097 CLKID_SYS_ADCANA 73
0098
0099 Example of clock consumer with _SYS_ and _AHB_ sinks.
0100 uart4: serial@80010000 {
0101 compatible = "alphascale,asm9260-uart";
0102 reg = <0x80010000 0x4000>;
0103 clocks = <&acc CLKID_SYS_UART4>, <&acc CLKID_AHB_UART4>;
0104 interrupts = <19>;
0105 };
0106
0107 Clock consumer with only one, _AHB_ sink.
0108 timer0: timer@80088000 {
0109 compatible = "alphascale,asm9260-timer";
0110 reg = <0x80088000 0x4000>;
0111 clocks = <&acc CLKID_AHB_TIMER0>;
0112 interrupts = <29>;
0113 };
0114