0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVIDIA Tegra ACONNECT Bus
0008
0009 description: |
0010 The Tegra ACONNECT bus is an AXI switch which is used to connnect various
0011 components inside the Audio Processing Engine (APE). All CPU accesses to
0012 the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
0013 devices accessed via the ACONNNECT are described by child-nodes.
0014
0015 maintainers:
0016 - Jon Hunter <jonathanh@nvidia.com>
0017
0018 properties:
0019 compatible:
0020 oneOf:
0021 - const: nvidia,tegra210-aconnect
0022 - items:
0023 - enum:
0024 - nvidia,tegra234-aconnect
0025 - nvidia,tegra186-aconnect
0026 - nvidia,tegra194-aconnect
0027 - const: nvidia,tegra210-aconnect
0028
0029 clocks:
0030 items:
0031 - description: Must contain the entry for APE clock
0032 - description: Must contain the entry for APE interface clock
0033
0034 clock-names:
0035 items:
0036 - const: ape
0037 - const: apb2ape
0038
0039 power-domains:
0040 maxItems: 1
0041
0042 "#address-cells":
0043 const: 1
0044
0045 "#size-cells":
0046 const: 1
0047
0048 ranges: true
0049
0050 patternProperties:
0051 "@[0-9a-f]+$":
0052 type: object
0053
0054 required:
0055 - compatible
0056 - clocks
0057 - clock-names
0058 - power-domains
0059 - "#address-cells"
0060 - "#size-cells"
0061 - ranges
0062
0063 additionalProperties: false
0064
0065 examples:
0066 - |
0067 #include<dt-bindings/clock/tegra210-car.h>
0068
0069 aconnect@702c0000 {
0070 compatible = "nvidia,tegra210-aconnect";
0071 clocks = <&tegra_car TEGRA210_CLK_APE>,
0072 <&tegra_car TEGRA210_CLK_APB2APE>;
0073 clock-names = "ape", "apb2ape";
0074 power-domains = <&pd_audio>;
0075
0076 #address-cells = <1>;
0077 #size-cells = <1>;
0078 ranges = <0x702c0000 0x702c0000 0x00040000>;
0079
0080 // Child device nodes follow ...
0081 };
0082
0083 ...
