0001 Device tree bindings for i.MX Wireless External Interface Module (WEIM)
0002
0003 The term "wireless" does not imply that the WEIM is literally an interface
0004 without wires. It simply means that this module was originally designed for
0005 wireless and mobile applications that use low-power technology.
0006
0007 The actual devices are instantiated from the child nodes of a WEIM node.
0008
0009 Required properties:
0010
0011 - compatible: Should contain one of the following:
0012 "fsl,imx1-weim"
0013 "fsl,imx27-weim"
0014 "fsl,imx51-weim"
0015 "fsl,imx50-weim"
0016 "fsl,imx6q-weim"
0017 - reg: A resource specifier for the register space
0018 (see the example below)
0019 - clocks: the clock, see the example below.
0020 - #address-cells: Must be set to 2 to allow memory address translation
0021 - #size-cells: Must be set to 1 to allow CS address passing
0022 - ranges: Must be set up to reflect the memory layout with four
0023 integer values for each chip-select line in use:
0024
0025 <cs-number> 0 <physical address of mapping> <size>
0026
0027 Optional properties:
0028
0029 - fsl,weim-cs-gpr: For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
0030 devices, it should be the phandle to the system General
0031 Purpose Register controller that contains WEIM CS GPR
0032 register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]
0033 should be set up as one of the following 4 possible
0034 values depending on the CS space configuration.
0035
0036 IOMUXC_GPR1[11:0] CS0 CS1 CS2 CS3
0037 ---------------------------------------------
0038 05 128M 0M 0M 0M
0039 033 64M 64M 0M 0M
0040 0113 64M 32M 32M 0M
0041 01111 32M 32M 32M 32M
0042
0043 In case that the property is absent, the reset value or
0044 what bootloader sets up in IOMUXC_GPR1[11:0] will be
0045 used.
0046
0047 - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of
0048 devices, the presence of this property indicates that
0049 the weim bus should operate in Burst Clock Mode.
0050
0051 - fsl,continuous-burst-clk Make Burst Clock to output continuous clock.
0052 Without this option Burst Clock will output clock
0053 only when necessary. This takes effect only if
0054 "fsl,burst-clk-enable" is set.
0055
0056 Timing property for child nodes. It is mandatory, not optional.
0057
0058 - fsl,weim-cs-timing: The timing array, contains timing values for the
0059 child node. We get the CS indexes from the address
0060 ranges in the child node's "reg" property.
0061 The number of registers depends on the selected chip:
0062 For i.MX1, i.MX21 ("fsl,imx1-weim") there are two
0063 registers: CSxU, CSxL.
0064 For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")
0065 there are three registers: CSCRxU, CSCRxL, CSCRxA.
0066 For i.MX50, i.MX53 ("fsl,imx50-weim"),
0067 i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")
0068 there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,
0069 CSxRCR2, CSxWCR1, CSxWCR2.
0070
0071 Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:
0072
0073 weim: weim@21b8000 {
0074 compatible = "fsl,imx6q-weim";
0075 reg = <0x021b8000 0x4000>;
0076 clocks = <&clks 196>;
0077 #address-cells = <2>;
0078 #size-cells = <1>;
0079 ranges = <0 0 0x08000000 0x08000000>;
0080 fsl,weim-cs-gpr = <&gpr>;
0081
0082 nor@0,0 {
0083 compatible = "cfi-flash";
0084 reg = <0 0 0x02000000>;
0085 #address-cells = <1>;
0086 #size-cells = <1>;
0087 bank-width = <2>;
0088 fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000
0089 0x0000c000 0x1404a38e 0x00000000>;
0090 };
0091 };
0092
0093 Example for an imx6q-based board, a multi-chipselect device connected to WEIM:
0094
0095 In this case, both chip select 0 and 1 will be configured with the same timing
0096 array values.
0097
0098 weim: weim@21b8000 {
0099 compatible = "fsl,imx6q-weim";
0100 reg = <0x021b8000 0x4000>;
0101 clocks = <&clks 196>;
0102 #address-cells = <2>;
0103 #size-cells = <1>;
0104 ranges = <0 0 0x08000000 0x02000000
0105 1 0 0x0a000000 0x02000000
0106 2 0 0x0c000000 0x02000000
0107 3 0 0x0e000000 0x02000000>;
0108 fsl,weim-cs-gpr = <&gpr>;
0109
0110 acme@0 {
0111 compatible = "acme,whatever";
0112 reg = <0 0 0x100>, <0 0x400000 0x800>,
0113 <1 0x400000 0x800>;
0114 fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
0115 0x00000000 0xa0000240 0x00000000>;
0116 };
0117 };
