0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/bus/brcm,gisb-arb.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Broadcom GISB bus Arbiter controller
0008
0009 maintainers:
0010 - Florian Fainelli <f.fainelli@gmail.com>
0011
0012 properties:
0013 compatible:
0014 oneOf:
0015 - items:
0016 - enum:
0017 - brcm,bcm7445-gisb-arb # for other 28nm chips
0018 - const: brcm,gisb-arb
0019 - items:
0020 - enum:
0021 - brcm,bcm7278-gisb-arb # for V7 28nm chips
0022 - brcm,bcm7435-gisb-arb # for newer 40nm chips
0023 - brcm,bcm7400-gisb-arb # for older 40nm chips and all 65nm chips
0024 - brcm,bcm7038-gisb-arb # for 130nm chips
0025 - brcm,gisb-arb # fallback compatible
0026
0027 reg:
0028 maxItems: 1
0029
0030 interrupts:
0031 minItems: 2
0032 items:
0033 - description: timeout interrupt line
0034 - description: target abort interrupt line
0035 - description: breakpoint interrupt line
0036
0037 brcm,gisb-arb-master-mask:
0038 $ref: /schemas/types.yaml#/definitions/uint32
0039 description: >
0040 32-bits wide bitmask used to specify which GISB masters are valid at the
0041 system level
0042
0043 brcm,gisb-arb-master-names:
0044 $ref: /schemas/types.yaml#/definitions/string-array
0045 description: >
0046 String list of the litteral name of the GISB masters. Should match the
0047 number of bits set in brcm,gisb-master-mask and the order in which they
0048 appear from MSB to LSB.
0049
0050 required:
0051 - compatible
0052 - reg
0053 - interrupts
0054
0055 additionalProperties: false
0056
0057 examples:
0058 - |
0059 gisb-arb@f0400000 {
0060 compatible = "brcm,gisb-arb";
0061 reg = <0xf0400000 0x800>;
0062 interrupts = <0>, <2>;
0063 interrupt-parent = <&sun_l2_intc>;
0064 brcm,gisb-arb-master-mask = <0x7>;
0065 brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0";
0066 };
