0001 OMAP PRCM bindings
0002
0003 Power Reset and Clock Manager lists the device clocks and clockdomains under
0004 a DT hierarchy. Each TI SoC can have multiple PRCM entities listed for it,
0005 each describing one module and the clock hierarchy under it. see [1] for
0006 documentation about the individual clock/clockdomain nodes.
0007
0008 [1] Documentation/devicetree/bindings/clock/ti/*
0009
0010 Required properties:
0011 - compatible: Must be one of:
0012 "ti,am3-prcm"
0013 "ti,am4-prcm"
0014 "ti,omap2-prcm"
0015 "ti,omap3-prm"
0016 "ti,omap3-cm"
0017 "ti,omap4-cm1"
0018 "ti,omap4-prm"
0019 "ti,omap4-cm2"
0020 "ti,omap4-scrm"
0021 "ti,omap5-prm"
0022 "ti,omap5-cm-core-aon"
0023 "ti,omap5-scrm"
0024 "ti,omap5-cm-core"
0025 "ti,dra7-prm"
0026 "ti,dra7-cm-core-aon"
0027 "ti,dra7-cm-core"
0028 "ti,dm814-prcm"
0029 "ti,dm816-prcm"
0030 - reg: Contains PRCM module register address range
0031 (base address and length)
0032 - clocks: clocks for this module
0033 - clockdomains: clockdomains for this module
0034 - #clock-cells: From common clock binding
0035 - clock-output-names: From common clock binding
0036
0037
0038 Example:
0039
0040 cm: clock@48004000 {
0041 compatible = "ti,omap3-cm";
0042 reg = <0x48004000 0x4000>;
0043 #clock-cells = <0>;
0044 clock-output-names = "cm";
0045
0046 cm_clocks: clocks {
0047 #address-cells = <1>;
0048 #size-cells = <0>;
0049 };
0050
0051 cm_clockdomains: clockdomains {
0052 };
0053 }
0054
0055 &cm_clocks {
0056 omap2_32k_fck: omap_32k_fck {
0057 #clock-cells = <0>;
0058 compatible = "fixed-clock";
0059 clock-frequency = <32768>;
0060 };
0061 };
0062
0063 &cm_clockdomains {
0064 core_l3_clkdm: core_l3_clkdm {
0065 compatible = "ti,clockdomain";
0066 clocks = <&sdrc_ick>;
0067 };
0068 };
