0001 OMAP Control Module bindings
0002
0003 Control Module contains miscellaneous features under it based on SoC type.
0004 Pincontrol is one common feature, and it has a specialized support
0005 described in [1]. Typically some clock nodes are also under control module.
0006 Syscon is used to share register level access to drivers external to
0007 control module driver itself.
0008
0009 See [2] for documentation about clock/clockdomain nodes.
0010
0011 [1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
0012 [2] Documentation/devicetree/bindings/clock/ti/*
0013
0014 Required properties:
0015 - compatible: Must be one of:
0016 "ti,am3-scm"
0017 "ti,am4-scm"
0018 "ti,dm814-scrm"
0019 "ti,dm816-scrm"
0020 "ti,omap2-scm"
0021 "ti,omap3-scm"
0022 "ti,omap4-scm-core"
0023 "ti,omap4-scm-padconf-core"
0024 "ti,omap4-scm-wkup"
0025 "ti,omap4-scm-padconf-wkup"
0026 "ti,omap5-scm-core"
0027 "ti,omap5-scm-padconf-core"
0028 "ti,omap5-scm-wkup-pad-conf"
0029 "ti,dra7-scm-core"
0030 - reg: Contains Control Module register address range
0031 (base address and length)
0032
0033 Optional properties:
0034 - clocks: clocks for this module
0035 - clockdomains: clockdomains for this module
0036
0037 Examples:
0038
0039 scm: scm@2000 {
0040 compatible = "ti,omap3-scm", "simple-bus";
0041 reg = <0x2000 0x2000>;
0042 #address-cells = <1>;
0043 #size-cells = <1>;
0044 ranges = <0 0x2000 0x2000>;
0045
0046 omap3_pmx_core: pinmux@30 {
0047 compatible = "ti,omap3-padconf",
0048 "pinctrl-single";
0049 reg = <0x30 0x230>;
0050 #address-cells = <1>;
0051 #size-cells = <0>;
0052 #interrupt-cells = <1>;
0053 interrupt-controller;
0054 pinctrl-single,register-width = <16>;
0055 pinctrl-single,function-mask = <0xff1f>;
0056 };
0057
0058 scm_conf: scm_conf@270 {
0059 compatible = "syscon";
0060 reg = <0x270 0x330>;
0061 #address-cells = <1>;
0062 #size-cells = <1>;
0063
0064 scm_clocks: clocks {
0065 #address-cells = <1>;
0066 #size-cells = <0>;
0067 };
0068 };
0069
0070 scm_clockdomains: clockdomains {
0071 };
0072 }
0073
0074 &scm_clocks {
0075 mcbsp5_mux_fck: mcbsp5_mux_fck {
0076 #clock-cells = <0>;
0077 compatible = "ti,composite-mux-clock";
0078 clocks = <&core_96m_fck>, <&mcbsp_clks>;
0079 ti,bit-shift = <4>;
0080 reg = <0x02d8>;
0081 };
0082 };
