0001 Mediatek vdecsys controller
0002 ============================
0003
0004 The Mediatek vdecsys controller provides various clocks to the system.
0005
0006 Required Properties:
0007
0008 - compatible: Should be one of:
0009 - "mediatek,mt2701-vdecsys", "syscon"
0010 - "mediatek,mt2712-vdecsys", "syscon"
0011 - "mediatek,mt6779-vdecsys", "syscon"
0012 - "mediatek,mt6797-vdecsys", "syscon"
0013 - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
0014 - "mediatek,mt8167-vdecsys", "syscon"
0015 - "mediatek,mt8173-vdecsys", "syscon"
0016 - "mediatek,mt8183-vdecsys", "syscon"
0017 - #clock-cells: Must be 1
0018
0019 The vdecsys controller uses the common clk binding from
0020 Documentation/devicetree/bindings/clock/clock-bindings.txt
0021 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
0022
0023 Example:
0024
0025 vdecsys: clock-controller@16000000 {
0026 compatible = "mediatek,mt8173-vdecsys", "syscon";
0027 reg = <0 0x16000000 0 0x1000>;
0028 #clock-cells = <1>;
0029 };
