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0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
0005 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0006 
0007 title: MediaTek mmsys controller
0008 
0009 maintainers:
0010   - Matthias Brugger <matthias.bgg@gmail.com>
0011 
0012 description:
0013   The MediaTek mmsys system controller provides clock control, routing control,
0014   and miscellaneous control in mmsys partition.
0015 
0016 properties:
0017   $nodename:
0018     pattern: "^syscon@[0-9a-f]+$"
0019 
0020   compatible:
0021     oneOf:
0022       - items:
0023           - enum:
0024               - mediatek,mt2701-mmsys
0025               - mediatek,mt2712-mmsys
0026               - mediatek,mt6765-mmsys
0027               - mediatek,mt6779-mmsys
0028               - mediatek,mt6797-mmsys
0029               - mediatek,mt8167-mmsys
0030               - mediatek,mt8173-mmsys
0031               - mediatek,mt8183-mmsys
0032               - mediatek,mt8186-mmsys
0033               - mediatek,mt8192-mmsys
0034               - mediatek,mt8195-mmsys
0035               - mediatek,mt8365-mmsys
0036           - const: syscon
0037       - items:
0038           - const: mediatek,mt7623-mmsys
0039           - const: mediatek,mt2701-mmsys
0040           - const: syscon
0041 
0042   reg:
0043     maxItems: 1
0044 
0045   power-domains:
0046     description:
0047       A phandle and PM domain specifier as defined by bindings
0048       of the power controller specified by phandle. See
0049       Documentation/devicetree/bindings/power/power-domain.yaml for details.
0050 
0051   mboxes:
0052     description:
0053       Using mailbox to communicate with GCE, it should have this
0054       property and list of phandle, mailbox specifiers. See
0055       Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
0056     $ref: /schemas/types.yaml#/definitions/phandle-array
0057 
0058   mediatek,gce-client-reg:
0059     description:
0060       The register of client driver can be configured by gce with 4 arguments
0061       defined in this property, such as phandle of gce, subsys id,
0062       register offset and size.
0063       Each subsys id is mapping to a base address of display function blocks
0064       register which is defined in the gce header
0065       include/dt-bindings/gce/<chip>-gce.h.
0066     $ref: /schemas/types.yaml#/definitions/phandle-array
0067     maxItems: 1
0068 
0069   "#clock-cells":
0070     const: 1
0071 
0072   '#reset-cells':
0073     const: 1
0074 
0075 required:
0076   - compatible
0077   - reg
0078   - "#clock-cells"
0079 
0080 additionalProperties: false
0081 
0082 examples:
0083   - |
0084     #include <dt-bindings/power/mt8173-power.h>
0085     #include <dt-bindings/gce/mt8173-gce.h>
0086 
0087     mmsys: syscon@14000000 {
0088         compatible = "mediatek,mt8173-mmsys", "syscon";
0089         reg = <0x14000000 0x1000>;
0090         power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
0091         #clock-cells = <1>;
0092         #reset-cells = <1>;
0093         mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
0094                  <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
0095         mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
0096     };