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OSCL-LXR

 
 

    


0001 Mediatek mipi0a (mipi_rx_ana_csi0a) controller
0002 ============================
0003 
0004 The Mediatek mipi0a controller provides various clocks
0005 to the system.
0006 
0007 Required Properties:
0008 
0009 - compatible: Should be one of:
0010         - "mediatek,mt6765-mipi0a", "syscon"
0011 - #clock-cells: Must be 1
0012 
0013 The mipi0a controller uses the common clk binding from
0014 Documentation/devicetree/bindings/clock/clock-bindings.txt
0015 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
0016 
0017 The mipi0a controller also uses the common power domain from
0018 Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
0019 The available power doamins are defined in dt-bindings/power/mt*-power.h.
0020 
0021 Example:
0022 
0023 mipi0a: clock-controller@11c10000 {
0024         compatible = "mediatek,mt6765-mipi0a", "syscon";
0025         reg = <0 0x11c10000 0 0x1000>;
0026         power-domains = <&scpsys MT6765_POWER_DOMAIN_CAM>;
0027         #clock-cells = <1>;
0028 };