0001 =========================================================
0002 Secondary CPU enable-method "nuvoton,npcm750-smp" binding
0003 =========================================================
0004
0005 To apply to all CPUs, a single "nuvoton,npcm750-smp" enable method should be
0006 defined in the "cpus" node.
0007
0008 Enable method name: "nuvoton,npcm750-smp"
0009 Compatible machines: "nuvoton,npcm750"
0010 Compatible CPUs: "arm,cortex-a9"
0011 Related properties: (none)
0012
0013 Note:
0014 This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
0015 "nuvoton,npcm750-gcr".
0016
0017 Example:
0018
0019 cpus {
0020 #address-cells = <1>;
0021 #size-cells = <0>;
0022 enable-method = "nuvoton,npcm750-smp";
0023
0024 cpu@0 {
0025 device_type = "cpu";
0026 compatible = "arm,cortex-a9";
0027 clocks = <&clk NPCM7XX_CLK_CPU>;
0028 clock-names = "clk_cpu";
0029 reg = <0>;
0030 next-level-cache = <&L2>;
0031 };
0032
0033 cpu@1 {
0034 device_type = "cpu";
0035 compatible = "arm,cortex-a9";
0036 clocks = <&clk NPCM7XX_CLK_CPU>;
0037 clock-names = "clk_cpu";
0038 reg = <1>;
0039 next-level-cache = <&L2>;
0040 };
0041 };
0042
