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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/arm/calxeda/hb-sregs.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Calxeda Highbank system registers
0008 
0009 description: |
0010   The Calxeda Highbank system has a block of MMIO registers controlling
0011   several generic system aspects. Those can be used to control some power
0012   management, they also contain some gate and PLL clocks.
0013 
0014 maintainers:
0015   - Andre Przywara <andre.przywara@arm.com>
0016 
0017 properties:
0018   compatible:
0019     const: calxeda,hb-sregs
0020 
0021   reg:
0022     maxItems: 1
0023 
0024   clocks:
0025     type: object
0026 
0027 required:
0028   - compatible
0029   - reg
0030 
0031 additionalProperties: false
0032 
0033 examples:
0034   - |
0035     sregs@fff3c000 {
0036         compatible = "calxeda,hb-sregs";
0037         reg = <0xfff3c000 0x1000>;
0038 
0039         clocks {
0040             #address-cells = <1>;
0041             #size-cells = <0>;
0042 
0043             osc: oscillator {
0044                 #clock-cells = <0>;
0045                 compatible = "fixed-clock";
0046                 clock-frequency = <33333000>;
0047             };
0048         };
0049     };