0001 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
0002 -----------------------------------------------------------
0003
0004 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
0005 following properties:
0006
0007 Required root node property:
0008
0009 compatible: should be "brcm,bcm63138"
0010
0011 An optional Boot lookup table Device Tree node is required for secondary CPU
0012 initialization as well as a 'resets' phandle to the correct PMB controller as
0013 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
0014 'enable-method' property.
0015
0016 Required properties for the Boot lookup table node:
0017 - compatible: should be "brcm,bcm63138-bootlut"
0018 - reg: register base address and length for the Boot Lookup table
0019
0020 Optional properties for the primary CPU node:
0021 - enable-method: should be "brcm,bcm63138"
0022
0023 Optional properties for the secondary CPU node:
0024 - enable-method: should be "brcm,bcm63138"
0025 - resets: phandle to the relevant PMB controller, one integer indicating the internal
0026 bus number, and a second integer indicating the address of the CPU in the PMB
0027 internal bus number.
0028
0029 Example:
0030
0031 cpus {
0032 cpu@0 {
0033 compatible = "arm,cortex-a9";
0034 reg = <0>;
0035 ...
0036 enable-method = "brcm,bcm63138";
0037 };
0038
0039 cpu@1 {
0040 compatible = "arm,cortex-a9";
0041 reg = <1>;
0042 ...
0043 enable-method = "brcm,bcm63138";
0044 resets = <&pmb0 4 1>;
0045 };
0046 };
0047
0048 bootlut: bootlut@8000 {
0049 compatible = "brcm,bcm63138-bootlut";
0050 reg = <0x8000 0x50>;
0051 };
0052
0053 =======
0054 reboot
0055 ------
0056 Two nodes are required for software reboot: a timer node and a syscon-reboot node.
0057
0058 Timer node:
0059
0060 - compatible: Must be "brcm,bcm6328-timer", "syscon"
0061 - reg: Register base address and length
0062
0063 Syscon reboot node:
0064
0065 See Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml for the
0066 detailed list of properties, the two values defined below are specific to the
0067 BCM6328-style timer:
0068
0069 - offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register
0070 from the beginning of the TIMER block
0071 - mask: Should be 1 for the SoftRst bit.
0072
0073 Example:
0074
0075 timer: timer@80 {
0076 compatible = "brcm,bcm6328-timer", "syscon";
0077 reg = <0x80 0x3c>;
0078 };
0079
0080 reboot {
0081 compatible = "syscon-reboot";
0082 regmap = <&timer>;
0083 offset = <0x34>;
0084 mask = <0x1>;
0085 };
